Re: [PATCH v2 4/5] hw/misc: Add a basic Aspeed LPC controller model

2021-03-01 Thread Andrew Jeffery
On Mon, 1 Mar 2021, at 11:36, Andrew Jeffery wrote: > From: Cédric Le Goater > > This is a very minimal framework to access registers which are used to > configure the AHB memory mapping of the flash chips on the LPC HC > Firmware address space. > > Signed-off-by: Cédric Le Goater > Signed-o

[PATCH v2 4/5] hw/misc: Add a basic Aspeed LPC controller model

2021-02-28 Thread Andrew Jeffery
From: Cédric Le Goater This is a very minimal framework to access registers which are used to configure the AHB memory mapping of the flash chips on the LPC HC Firmware address space. Signed-off-by: Cédric Le Goater Signed-off-by: Andrew Jeffery --- docs/system/arm/aspeed.rst | 2 +- hw/a