Re: [PATCH v2 3/8] target/riscv: Implement Ssdbltrp exception handling

2024-10-18 Thread Clément Léger
On 18/10/2024 04:25, Alistair Francis wrote: > On Thu, Oct 17, 2024 at 5:45 PM Clément Léger wrote: >> >> >> >> On 17/10/2024 06:29, Alistair Francis wrote: >>> On Mon, Oct 14, 2024 at 5:43 PM Clément Léger wrote: On 11/10/2024 05:22, Alistair Francis wrote: > On Wed, S

Re: [PATCH v2 3/8] target/riscv: Implement Ssdbltrp exception handling

2024-10-17 Thread Alistair Francis
On Thu, Oct 17, 2024 at 5:45 PM Clément Léger wrote: > > > > On 17/10/2024 06:29, Alistair Francis wrote: > > On Mon, Oct 14, 2024 at 5:43 PM Clément Léger wrote: > >> > >> > >> > >> On 11/10/2024 05:22, Alistair Francis wrote: > >>> On Wed, Sep 25, 2024 at 9:59 PM Clément Léger wrote: > >

Re: [PATCH v2 3/8] target/riscv: Implement Ssdbltrp exception handling

2024-10-17 Thread Clément Léger
On 17/10/2024 06:29, Alistair Francis wrote: > On Mon, Oct 14, 2024 at 5:43 PM Clément Léger wrote: >> >> >> >> On 11/10/2024 05:22, Alistair Francis wrote: >>> On Wed, Sep 25, 2024 at 9:59 PM Clément Léger wrote: When the Ssdbltrp ISA extension is enabled, if a trap happens in S-mod

Re: [PATCH v2 3/8] target/riscv: Implement Ssdbltrp exception handling

2024-10-16 Thread Alistair Francis
On Mon, Oct 14, 2024 at 5:43 PM Clément Léger wrote: > > > > On 11/10/2024 05:22, Alistair Francis wrote: > > On Wed, Sep 25, 2024 at 9:59 PM Clément Léger wrote: > >> > >> When the Ssdbltrp ISA extension is enabled, if a trap happens in S-mode > >> while SSTATUS.SDT isn't cleared, generate a dou

Re: [PATCH v2 3/8] target/riscv: Implement Ssdbltrp exception handling

2024-10-14 Thread Clément Léger
On 11/10/2024 05:22, Alistair Francis wrote: > On Wed, Sep 25, 2024 at 9:59 PM Clément Léger wrote: >> >> When the Ssdbltrp ISA extension is enabled, if a trap happens in S-mode >> while SSTATUS.SDT isn't cleared, generate a double trap exception to >> M-mode. >> >> Signed-off-by: Clément Léger

Re: [PATCH v2 3/8] target/riscv: Implement Ssdbltrp exception handling

2024-10-10 Thread Alistair Francis
On Wed, Sep 25, 2024 at 9:59 PM Clément Léger wrote: > > When the Ssdbltrp ISA extension is enabled, if a trap happens in S-mode > while SSTATUS.SDT isn't cleared, generate a double trap exception to > M-mode. > > Signed-off-by: Clément Léger > --- > target/riscv/cpu.c| 2 +- > target/r

[PATCH v2 3/8] target/riscv: Implement Ssdbltrp exception handling

2024-09-25 Thread Clément Léger
When the Ssdbltrp ISA extension is enabled, if a trap happens in S-mode while SSTATUS.SDT isn't cleared, generate a double trap exception to M-mode. Signed-off-by: Clément Léger --- target/riscv/cpu.c| 2 +- target/riscv/cpu_bits.h | 1 + target/riscv/cpu_helper.c | 47 ++