Re: [PATCH v2 2/5] target/riscv: Use the RISCVException enum for CSR predicates

2021-04-06 Thread Bin Meng
On Thu, Apr 1, 2021 at 11:19 PM Alistair Francis wrote: > > Signed-off-by: Alistair Francis > --- > target/riscv/cpu.h | 3 +- > target/riscv/csr.c | 80 +- > 2 files changed, 46 insertions(+), 37 deletions(-) > Reviewed-by: Bin Meng

Re: [PATCH v2 2/5] target/riscv: Use the RISCVException enum for CSR predicates

2021-04-02 Thread Richard Henderson
On 4/1/21 8:17 AM, Alistair Francis wrote: Signed-off-by: Alistair Francis --- target/riscv/cpu.h | 3 +- target/riscv/csr.c | 80 +- 2 files changed, 46 insertions(+), 37 deletions(-) Reviewed-by: Richard Henderson r~

[PATCH v2 2/5] target/riscv: Use the RISCVException enum for CSR predicates

2021-04-01 Thread Alistair Francis
Signed-off-by: Alistair Francis --- target/riscv/cpu.h | 3 +- target/riscv/csr.c | 80 +- 2 files changed, 46 insertions(+), 37 deletions(-) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 0a33d387ba..1291ddc381 100644 --- a/target/riscv/c