Re: [PATCH v2 03/10] hw/riscv: microchip_pfsoc: Connect DDR memory controller modules

2020-10-28 Thread Alistair Francis
On Tue, Oct 27, 2020 at 10:34 PM Bin Meng wrote: > > From: Bin Meng > > Connect DDR SGMII PHY module and CFG module to the PolarFire SoC. > > Signed-off-by: Bin Meng Reviewed-by: Alistair Francis Alistair > --- > > (no changes since v1) > > hw/riscv/Kconfig | 1 + > hw/ri

[PATCH v2 03/10] hw/riscv: microchip_pfsoc: Connect DDR memory controller modules

2020-10-27 Thread Bin Meng
From: Bin Meng Connect DDR SGMII PHY module and CFG module to the PolarFire SoC. Signed-off-by: Bin Meng --- (no changes since v1) hw/riscv/Kconfig | 1 + hw/riscv/microchip_pfsoc.c | 18 ++ include/hw/riscv/microchip_pfsoc.h | 5 + 3 files cha