Re: [PATCH v2] target/m68k: implement rtr instruction

2021-03-07 Thread Richard Henderson
On 3/7/21 11:08 AM, Laurent Vivier wrote: Both loads should happen (and thus exceptions recognized) before any other state writeback. Something like that? ccr = gen_load(s, OS_WORD, QREG_SP, 0, IS_USER(s)); tcg_gen_addi_i32(QREG_SP, QREG_SP, 2); tmp = gen_load(s, OS_LONG, QREG_

Re: [PATCH v2] target/m68k: implement rtr instruction

2021-03-07 Thread Mark Cave-Ayland
On 07/03/2021 18:22, Laurent Vivier wrote: This is needed to boot MacOS ROM. Pull the condition code and the program counter from the stack. Operation: (SP) -> CCR SP + 2 -> SP (SP) -> PC SP + 4 - > SP This operation is not privileged. Reported-by: Mark Cave-Ayland Sign

Re: [PATCH v2] target/m68k: implement rtr instruction

2021-03-07 Thread Laurent Vivier
Le 07/03/2021 à 19:45, Richard Henderson a écrit : > On 3/7/21 10:22 AM, Laurent Vivier wrote: >> +    ccr = gen_load(s, OS_WORD, QREG_SP, 0, IS_USER(s)); >> +    gen_set_sr(s, ccr, true); >> +    tcg_temp_free(ccr); >> +    tcg_gen_addi_i32(QREG_SP, QREG_SP, 2); >> +    tmp = gen_load(s, OS_LONG,

Re: [PATCH v2] target/m68k: implement rtr instruction

2021-03-07 Thread Richard Henderson
On 3/7/21 10:22 AM, Laurent Vivier wrote: +ccr = gen_load(s, OS_WORD, QREG_SP, 0, IS_USER(s)); +gen_set_sr(s, ccr, true); +tcg_temp_free(ccr); +tcg_gen_addi_i32(QREG_SP, QREG_SP, 2); +tmp = gen_load(s, OS_LONG, QREG_SP, 0, IS_USER(s)); +tcg_gen_addi_i32(QREG_SP, QREG_SP, 4

Re: [PATCH v2] target/m68k: implement rtr instruction

2021-03-07 Thread BALATON Zoltan
On Sun, 7 Mar 2021, Laurent Vivier wrote: This is needed to boot MacOS ROM. Pull the condition code and the program counter from the stack. Operation: (SP) -> CCR SP + 2 -> SP (SP) -> PC SP + 4 - > SP Doesn't look like the commit message was fixed, there's still a space there.

[PATCH v2] target/m68k: implement rtr instruction

2021-03-07 Thread Laurent Vivier
This is needed to boot MacOS ROM. Pull the condition code and the program counter from the stack. Operation: (SP) -> CCR SP + 2 -> SP (SP) -> PC SP + 4 - > SP This operation is not privileged. Reported-by: Mark Cave-Ayland Signed-off-by: Laurent Vivier --- Notes: v2: upd