On Thu, Jan 16, 2025 at 02:39:27PM +0100, Vasilis Liaskovitis wrote:
> This patch adds an "aliases" node with a "serial0" entry for the
s/This patch adds/Add/
> single UART in the riscv64 virt machine.
s/riscv64/riscv/
>
> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2774
> Signed-o
This patch adds an "aliases" node with a "serial0" entry for the
single UART in the riscv64 virt machine.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2774
Signed-off-by: Vasilis Liaskovitis
---
hw/riscv/virt.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/hw/riscv/virt.c b/h