Re: [PATCH v1 3/4] target/riscv: Enable native debug itrigger

2022-11-09 Thread Alistair Francis
On Thu, Oct 13, 2022 at 4:38 PM LIU Zhiwei wrote: > > When QEMU is not in icount mode, execute instruction one by one. The > tdata1 can be read directly. > > When QEMU is in icount mode, use a timer to simulate the itrigger. The > tdata1 may be not right because of lazy update of count in tdata1.

[PATCH v1 3/4] target/riscv: Enable native debug itrigger

2022-10-12 Thread LIU Zhiwei
When QEMU is not in icount mode, execute instruction one by one. The tdata1 can be read directly. When QEMU is in icount mode, use a timer to simulate the itrigger. The tdata1 may be not right because of lazy update of count in tdata1. Thus, We should pack the adjusted count into tdata1 before rea