Re: [PATCH v1 1/4] target/riscv: Add itrigger support when icount is not enabled

2022-11-09 Thread Alistair Francis
On Mon, Nov 7, 2022 at 12:01 PM LIU Zhiwei wrote: > > > On 2022/11/7 9:37, Alistair Francis wrote: > > On Thu, Oct 13, 2022 at 4:32 PM LIU Zhiwei > > wrote: > >> When icount is not enabled, there is no API in QEMU that can get the > >> guest instruction number. > >> > >> Translate the guest code

Re: [PATCH v1 1/4] target/riscv: Add itrigger support when icount is not enabled

2022-11-07 Thread LIU Zhiwei
On 2022/11/7 23:58, Alex Bennée wrote: LIU Zhiwei writes: On 2022/11/7 9:37, Alistair Francis wrote: On Thu, Oct 13, 2022 at 4:32 PM LIU Zhiwei wrote: When icount is not enabled, there is no API in QEMU that can get the guest instruction number. Translate the guest code in a way that each

Re: [PATCH v1 1/4] target/riscv: Add itrigger support when icount is not enabled

2022-11-07 Thread Alex Bennée
LIU Zhiwei writes: > On 2022/11/7 9:37, Alistair Francis wrote: >> On Thu, Oct 13, 2022 at 4:32 PM LIU Zhiwei >> wrote: >>> When icount is not enabled, there is no API in QEMU that can get the >>> guest instruction number. >>> >>> Translate the guest code in a way that each TB only has one in

Re: [PATCH v1 1/4] target/riscv: Add itrigger support when icount is not enabled

2022-11-06 Thread LIU Zhiwei
On 2022/11/7 9:37, Alistair Francis wrote: On Thu, Oct 13, 2022 at 4:32 PM LIU Zhiwei wrote: When icount is not enabled, there is no API in QEMU that can get the guest instruction number. Translate the guest code in a way that each TB only has one instruction. I don't think this is a great

Re: [PATCH v1 1/4] target/riscv: Add itrigger support when icount is not enabled

2022-11-06 Thread Alistair Francis
On Thu, Oct 13, 2022 at 4:32 PM LIU Zhiwei wrote: > > When icount is not enabled, there is no API in QEMU that can get the > guest instruction number. > > Translate the guest code in a way that each TB only has one instruction. I don't think this is a great idea. Why can't we just require icount

[PATCH v1 1/4] target/riscv: Add itrigger support when icount is not enabled

2022-10-12 Thread LIU Zhiwei
When icount is not enabled, there is no API in QEMU that can get the guest instruction number. Translate the guest code in a way that each TB only has one instruction. After executing the instruction, decrease the count by 1 until it reaches 0 where the itrigger fires. Note that only when privile