onzini
> ; open list:ASPEED BMCs ;
> open list:All patches CC here ; open list:Block layer
> core
> Cc: Troy Lee ; Yunlin Tang
>
> Subject: Re: [SPAM] [PATCH v1 01/16] aspeed/smc: Fix write incorrect data into
> flash in user mode
>
> Hello Jamin,
>
> On 10/18/24 0
Hello Jamin,
On 10/18/24 07:30, Jamin Lin wrote:
According to the design of ASPEED SPI controllers user mode, users write the
data to flash, the SPI drivers set the Control Register(0x10) bit 0 and 1
enter user mode. Then, SPI drivers send flash commands for writing data.
Finally, SPI drivers se
According to the design of ASPEED SPI controllers user mode, users write the
data to flash, the SPI drivers set the Control Register(0x10) bit 0 and 1
enter user mode. Then, SPI drivers send flash commands for writing data.
Finally, SPI drivers set the Control Register (0x10) bit 2 to stop
active c
