[PATCH for-5.1] hw/timer/imx_epit: Avoid assertion when CR.SWR is written

2020-10-12 Thread Peter Maydell
The imx_epit device has a software-controllable reset triggered by setting the SWR bit in the CR register. An error in commit cc2722ec83ad9 means that we will end up assert()ing if the guest does this, because the code in imx_epit_write() starts ptimer transactions, and then imx_epit_reset() also s

Re: [PATCH for-5.1] hw/timer/imx_epit: Avoid assertion when CR.SWR is written

2020-08-03 Thread Philippe Mathieu-Daudé
On 7/27/20 5:45 PM, Peter Maydell wrote: > The imx_epit device has a software-controllable reset triggered by > setting the SWR bit in the CR register. An error in commit cc2722ec83ad9 > means that we will end up assert()ing if the guest does this, because > the code in imx_epit_write() starts ptim

[PATCH for-5.1] hw/timer/imx_epit: Avoid assertion when CR.SWR is written

2020-07-27 Thread Peter Maydell
The imx_epit device has a software-controllable reset triggered by setting the SWR bit in the CR register. An error in commit cc2722ec83ad9 means that we will end up assert()ing if the guest does this, because the code in imx_epit_write() starts ptimer transactions, and then imx_epit_reset() also s