On Fri, Mar 26, 2021 at 7:11 AM Peter Maydell wrote:
>
> On Fri, 26 Mar 2021 at 10:21, Dylan Jhong wrote:
> > Currently, there is no structure like "qdev_prop_target_ulong".
> > So, we still need to use an if-else condition to determine the attributes
> > of the 5th parameter.
> > Something like
On Fri, 26 Mar 2021 at 10:21, Dylan Jhong wrote:
> Currently, there is no structure like "qdev_prop_target_ulong".
> So, we still need to use an if-else condition to determine the attributes of
> the 5th parameter.
> Something like this:
> #if defined(TARGET_RISCV32)
> DEFINE_PROP_UNS
On Fri, Mar 26, 2021 at 04:19:09AM +0800, Alistair Francis wrote:
> On Thu, Mar 25, 2021 at 5:43 AM Dylan Jhong wrote:
> >
> > Signed-off-by: Dylan Jhong
> > Signed-off-by: Ruinland ChuanTzu Tsai
> > ---
> > target/riscv/cpu.c | 6 +-
> > target/riscv/cpu.h | 2 +-
> > 2 files changed, 6 in
On Thu, Mar 25, 2021 at 5:43 AM Dylan Jhong wrote:
>
> Signed-off-by: Dylan Jhong
> Signed-off-by: Ruinland ChuanTzu Tsai
> ---
> target/riscv/cpu.c | 6 +-
> target/riscv/cpu.h | 2 +-
> 2 files changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/target/riscv/cpu.c b/target/riscv/cpu
On Thu, Mar 25, 2021 at 5:42 PM Dylan Jhong wrote:
>
> Signed-off-by: Dylan Jhong
> Signed-off-by: Ruinland ChuanTzu Tsai
> ---
> target/riscv/cpu.c | 6 +-
> target/riscv/cpu.h | 2 +-
> 2 files changed, 6 insertions(+), 2 deletions(-)
>
Reviewed-by: Bin Meng
Signed-off-by: Dylan Jhong
Signed-off-by: Ruinland ChuanTzu Tsai
---
target/riscv/cpu.c | 6 +-
target/riscv/cpu.h | 2 +-
2 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 7d6ed80f6b..8a5f18bcb0 100644
--- a/target/riscv/cpu.c
+++ b
