on.cn; lixiang...@loongson.cn
> Subject: Re: [PATCH RFC V2 16/37] hw/acpi: Update CPUs AML with cpu-
> (ctrl)dev change
>
> On 9/26/23 20:04, Salil Mehta wrote:
> > CPUs Control device(\\_SB.PCI0) register interface for the x86 arch is
> based on
> > PCI a
On 9/26/23 20:04, Salil Mehta wrote:
CPUs Control device(\\_SB.PCI0) register interface for the x86 arch is based on
PCI and is IO port based and hence existing cpus AML code assumes _CRS objects
^^
CPUs Control device(\\_SB.PCI0) register interface for the x86 arch is based on
PCI and is IO port based and hence existing cpus AML code assumes _CRS objects
would evaluate to a system resource which describes IO Port address. But on ARM
arch CPUs control device(\\_SB.PRES) register interface is m
