Re: [PATCH 4/8] arm: Synchronize CPU on PSCI on

2020-11-27 Thread Paolo Bonzini
On 27/11/20 11:58, Alexander Graf wrote: Mostly because there is a lot of super fragile logic all over resets atm. Init setts dirty, post-init clears it. Then the arch reset handlers assume that state is not dirty and fiddle with KVM reset ioctls and KVM register modification ioctls directly. M

Re: [PATCH 4/8] arm: Synchronize CPU on PSCI on

2020-11-27 Thread Alexander Graf
On 27.11.20 05:41, Paolo Bonzini wrote: On 27/11/20 00:32, Alexander Graf wrote: On 26.11.20 23:26, Peter Maydell wrote: On Thu, 26 Nov 2020 at 22:16, Alexander Graf wrote: cpu_synchronize_state() sets the CPU registers into "dirty" state which means that env now holds the current copy. O

Re: [PATCH 4/8] arm: Synchronize CPU on PSCI on

2020-11-26 Thread Paolo Bonzini
On 27/11/20 00:32, Alexander Graf wrote: On 26.11.20 23:26, Peter Maydell wrote: On Thu, 26 Nov 2020 at 22:16, Alexander Graf wrote: cpu_synchronize_state() sets the CPU registers into "dirty" state which means that env now holds the current copy. On the next entry, we then sync them back int

Re: [PATCH 4/8] arm: Synchronize CPU on PSCI on

2020-11-26 Thread Alexander Graf
On 26.11.20 23:26, Peter Maydell wrote: On Thu, 26 Nov 2020 at 22:16, Alexander Graf wrote: cpu_synchronize_state() sets the CPU registers into "dirty" state which means that env now holds the current copy. On the next entry, we then sync them back into HVF. Without the cpu_synchronize_state

Re: [PATCH 4/8] arm: Synchronize CPU on PSCI on

2020-11-26 Thread Peter Maydell
On Thu, 26 Nov 2020 at 22:16, Alexander Graf wrote: > cpu_synchronize_state() sets the CPU registers into "dirty" state which > means that env now holds the current copy. On the next entry, we then > sync them back into HVF. > > Without the cpu_synchronize_state() call, HVF never knows that the CP

Re: [PATCH 4/8] arm: Synchronize CPU on PSCI on

2020-11-26 Thread Alexander Graf
On 26.11.20 22:47, Peter Maydell wrote: On Thu, 26 Nov 2020 at 21:36, Alexander Graf wrote: We are going to reuse the TCG PSCI code for HVF. This however means that we need to ensure that CPU register state is synchronized properly between the two worlds. So let's make sure that at least on

[PATCH 4/8] arm: Synchronize CPU on PSCI on

2020-11-26 Thread Alexander Graf
We are going to reuse the TCG PSCI code for HVF. This however means that we need to ensure that CPU register state is synchronized properly between the two worlds. So let's make sure that at least on the PSCI on call, the secondary core gets to sync its registers after reset, so that changes also

Re: [PATCH 4/8] arm: Synchronize CPU on PSCI on

2020-11-26 Thread Peter Maydell
On Thu, 26 Nov 2020 at 21:36, Alexander Graf wrote: > > We are going to reuse the TCG PSCI code for HVF. This however means that we > need to ensure that CPU register state is synchronized properly between the > two worlds. > > So let's make sure that at least on the PSCI on call, the secondary co