Re: [PATCH 4/4] async: use explicit memory barriers and relaxed accesses

2020-04-07 Thread Paolo Bonzini
On 07/04/20 11:09, Stefan Hajnoczi wrote: >> if (blocking) { >> -atomic_add(&ctx->notify_me, 2); >> +atomic_set(&ctx->notify_me, atomic_read(&ctx->notify_me) + 2); > Non-atomic "atomic" code looks suspicious and warrants a comment > mentioning that this is only executed from on

Re: [PATCH 4/4] async: use explicit memory barriers and relaxed accesses

2020-04-07 Thread Stefan Hajnoczi
On Mon, Apr 06, 2020 at 03:13:20PM -0400, Paolo Bonzini wrote: > When using C11 atomics, non-seqcst reads and writes do not participate > in the total order of seqcst operations. In util/async.c and > util/aio-posix.c, > in particular, the pattern that we use > > write ctx->notify_me

[PATCH 4/4] async: use explicit memory barriers and relaxed accesses

2020-04-06 Thread Paolo Bonzini
When using C11 atomics, non-seqcst reads and writes do not participate in the total order of seqcst operations. In util/async.c and util/aio-posix.c, in particular, the pattern that we use write ctx->notify_me write bh->scheduled read bh->scheduled