On Fri Dec 13, 2024 at 3:14 PM AEST, Akihiko Odaki wrote:
> On 2024/12/12 17:34, Nicholas Piggin wrote:
> > Implement MMIO PBA writes, 1 to trigger and 0 to clear.
> >
> > This functionality is used by some qtests, which keep the msix irq
> > masked and test irq pending via the PBA bits, for simpl
On 2024/12/12 17:34, Nicholas Piggin wrote:
Implement MMIO PBA writes, 1 to trigger and 0 to clear.
This functionality is used by some qtests, which keep the msix irq
masked and test irq pending via the PBA bits, for simplicity. Some
tests expect to be able to clear the irq with a store, so a si
Implement MMIO PBA writes, 1 to trigger and 0 to clear.
This functionality is used by some qtests, which keep the msix irq
masked and test irq pending via the PBA bits, for simplicity. Some
tests expect to be able to clear the irq with a store, so a side-effect
of this is that qpci_msix_pending()
