Re: [PATCH 3/3] target/riscv: add profile->present flag

2025-05-28 Thread Alistair Francis
On Wed, May 21, 2025 at 3:24 AM Daniel Henrique Barboza wrote: > > Björn reported in [1] a case where a rv64 CPU is going through the > profile code path to enable satp mode. In this case,the amount of > extensions on top of the rv64 CPU made it compliant with the RVA22S64 > profile during the val

Re: [PATCH 3/3] target/riscv: add profile->present flag

2025-05-21 Thread Björn Töpel
Daniel Henrique Barboza writes: > Björn reported in [1] a case where a rv64 CPU is going through the > profile code path to enable satp mode. In this case,the amount of > extensions on top of the rv64 CPU made it compliant with the RVA22S64 > profile during the validation of CPU 0. When the subse

Re: [PATCH 3/3] target/riscv: add profile->present flag

2025-05-21 Thread Andrew Jones
On Tue, May 20, 2025 at 02:23:36PM -0300, Daniel Henrique Barboza wrote: > Björn reported in [1] a case where a rv64 CPU is going through the > profile code path to enable satp mode. In this case,the amount of > extensions on top of the rv64 CPU made it compliant with the RVA22S64 > profile during

[PATCH 3/3] target/riscv: add profile->present flag

2025-05-20 Thread Daniel Henrique Barboza
Björn reported in [1] a case where a rv64 CPU is going through the profile code path to enable satp mode. In this case,the amount of extensions on top of the rv64 CPU made it compliant with the RVA22S64 profile during the validation of CPU 0. When the subsequent CPUs were initialized the static pro