Re: [PATCH 2/4] target/riscv: Add CPU feature for AIA CSRs

On Fri, Jun 11, 2021 at 4:46 AM Alistair Francis wrote: > > On Sat, May 15, 2021 at 12:35 AM Anup Patel wrote: > > > > We add experimental CPU feature to enable AIA CSRs. This experimental > > feature can be enabled by setting "x-aia=true" for CPU in the QEMU > > command-line parameters. > > > >

Re: [PATCH 2/4] target/riscv: Add CPU feature for AIA CSRs

On Sat, May 15, 2021 at 12:35 AM Anup Patel wrote: > > We add experimental CPU feature to enable AIA CSRs. This experimental > feature can be enabled by setting "x-aia=true" for CPU in the QEMU > command-line parameters. > > Signed-off-by: Anup Patel > --- > target/riscv/cpu.c | 5 + > targe

[PATCH 2/4] target/riscv: Add CPU feature for AIA CSRs

We add experimental CPU feature to enable AIA CSRs. This experimental feature can be enabled by setting "x-aia=true" for CPU in the QEMU command-line parameters. Signed-off-by: Anup Patel --- target/riscv/cpu.c | 5 + target/riscv/cpu.h | 4 +++- 2 files changed, 8 insertions(+), 1 deletion(