Re: [PATCH 15/33] target/ppc: Implement Vector Insert from GPR using GPR index insns

2021-10-26 Thread Matheus K. Ferst
On 23/10/2021 01:40, Richard Henderson wrote: [E-MAIL EXTERNO] Não clique em links ou abra anexos, a menos que você possa confirmar o remetente e saber que o conteúdo é seguro. Em caso de e-mail suspeito entre imediatamente em contato com o DTI. On 10/21/21 12:45 PM, matheus.fe...@eldorado.org

Re: [PATCH 15/33] target/ppc: Implement Vector Insert from GPR using GPR index insns

2021-10-23 Thread Richard Henderson
On 10/23/21 1:02 PM, BALATON Zoltan wrote: So may question was not if it's possible but if having target_ulong different from what we had in qemu-system-ppc could cause any problems? I have no experience running 32-bit guests with qemu-system-ppc64 but previously when this came up one difference

Re: [PATCH 15/33] target/ppc: Implement Vector Insert from GPR using GPR index insns

2021-10-23 Thread BALATON Zoltan
On Sat, 23 Oct 2021, Richard Henderson wrote: On 10/23/21 3:12 AM, BALATON Zoltan wrote: You mentioning target_ulong reminded me a question I had. Currently we have qemu-system-ppc and qemu-system-ppc64 but the latter includes all machines of the former too so you could run for example sam460ex

Re: [PATCH 15/33] target/ppc: Implement Vector Insert from GPR using GPR index insns

2021-10-23 Thread Richard Henderson
On 10/23/21 3:12 AM, BALATON Zoltan wrote: You mentioning target_ulong reminded me a question I had. Currently we have qemu-system-ppc and qemu-system-ppc64 but the latter includes all machines of the former too so you could run for example sam460ex with qemu-system-ppc64 (except mac99 which be

Re: [PATCH 15/33] target/ppc: Implement Vector Insert from GPR using GPR index insns

2021-10-23 Thread BALATON Zoltan
On Fri, 22 Oct 2021, Richard Henderson wrote: On 10/21/21 12:45 PM, matheus.fe...@eldorado.org.br wrote: +#if defined(TARGET_PPC64) +return do_vinsx(ctx, a->vrt, size, right, cpu_gpr[a->vra], cpu_gpr[a->vrb], +gen_helper); +#else +bool ok; +TCGv_i64 val; + +

Re: [PATCH 15/33] target/ppc: Implement Vector Insert from GPR using GPR index insns

2021-10-22 Thread Richard Henderson
On 10/21/21 12:45 PM, matheus.fe...@eldorado.org.br wrote: +#if defined(TARGET_PPC64) +return do_vinsx(ctx, a->vrt, size, right, cpu_gpr[a->vra], cpu_gpr[a->vrb], +gen_helper); +#else +bool ok; +TCGv_i64 val; + +val = tcg_temp_new_i64(); +tcg_gen_extu_tl_i6

Re: [PATCH 15/33] target/ppc: Implement Vector Insert from GPR using GPR index insns

2021-10-22 Thread Richard Henderson
On 10/21/21 12:45 PM, matheus.fe...@eldorado.org.br wrote: +#if defined(HOST_WORDS_BIGENDIAN) +#define ELEM_ADDR(VEC, IDX, SIZE) (&(VEC)->VsrB(IDX)) +#else +#define ELEM_ADDR(VEC, IDX, SIZE) (&(VEC)->VsrB(IDX) - (SIZE) + 1) +#endif This is a bit confusing. There's host adjustment in VsrB *and*

[PATCH 15/33] target/ppc: Implement Vector Insert from GPR using GPR index insns

2021-10-21 Thread matheus . ferst
From: Matheus Ferst Implements the following PowerISA v3.1 instructions: vinsblx: Vector Insert Byte from GPR using GPR-specified Left-Index vinshlx: Vector Insert Halfword from GPR using GPR-specified Left-Index vinswlx: Vector Insert Word from GPR using GPR-specified Left-Index vinsdlx: Vector