Re: [PATCH 11/18] target/riscv: gdbstub: Drop the vector CSRs in riscv-vector.xml

On 2023/2/14 2:02, Bin Meng wrote: It's worth noting that the vector CSR predicate() has a similar run-time check logic to the FPU CSR. With the previous patch our gdbstub can correctly report these vector CSRs via the CSR xml. Commit 719d3561b269 ("target/riscv: gdb: support vector registers

Re: [PATCH 11/18] target/riscv: gdbstub: Drop the vector CSRs in riscv-vector.xml

On 2023/2/14 02:02, Bin Meng wrote: It's worth noting that the vector CSR predicate() has a similar run-time check logic to the FPU CSR. With the previous patch our gdbstub can correctly report these vector CSRs via the CSR xml. Commit 719d3561b269 ("target/riscv: gdb: support vector registers

[PATCH 11/18] target/riscv: gdbstub: Drop the vector CSRs in riscv-vector.xml

It's worth noting that the vector CSR predicate() has a similar run-time check logic to the FPU CSR. With the previous patch our gdbstub can correctly report these vector CSRs via the CSR xml. Commit 719d3561b269 ("target/riscv: gdb: support vector registers for rv64 & rv32") inserted these vecto