Re: [PATCH 11/13] target/riscv: Switch context in exception return

We only have to process the special CSRs(like vtype/misa) when xlen changes,  according to the explicitly  specified behavior about the CSR width change behavior. For normal CSRs, the default behavior in section 2.4 , CSR Width Modulation, is enough. And if we split the vill out, we will never

Re: [PATCH 11/13] target/riscv: Switch context in exception return

We only have to process the special CSRs(like vtype/misa) when xlen changes,  according to the explicitly  specified behavior about the CSR width change behavior. For normal CSRs, the default behavior in section 2.4 , CSR Width Modulation, is enough. And if we split the vill out, we will never

Re: [PATCH 11/13] target/riscv: Switch context in exception return

On 2021/11/2 上午12:43, Richard Henderson wrote: On 11/1/21 6:01 AM, LIU Zhiwei wrote: After excpetion return, we should give a xlen view of context in new priveledge, including the general registers, pc, and CSRs. Signed-off-by: LIU Zhiwei ---   target/riscv/helper.h |

Re: [PATCH 11/13] target/riscv: Switch context in exception return

On 11/1/21 6:01 AM, LIU Zhiwei wrote: After excpetion return, we should give a xlen view of context in new priveledge, including the general registers, pc, and CSRs. Signed-off-by: LIU Zhiwei --- target/riscv/helper.h | 1 + .../riscv/insn_trans/trans_privileged.c.in

[PATCH 11/13] target/riscv: Switch context in exception return

After excpetion return, we should give a xlen view of context in new priveledge, including the general registers, pc, and CSRs. Signed-off-by: LIU Zhiwei --- target/riscv/helper.h | 1 + .../riscv/insn_trans/trans_privileged.c.inc | 2 ++ target/riscv/op_helper.c