Re: [PATCH 1/2] target/riscv: check 'I' and 'E' after checking 'G' in riscv_cpu_realize

在 2022/5/17 上午8:23, Alistair Francis 写道: On Mon, May 16, 2022 at 1:36 PM Weiwei Li wrote: - setting ext_g will implicitly set ext_i Signed-off-by: Weiwei Li Signed-off-by: Junqiang Wang --- slirp | 2 +- target/riscv/cpu.c | 23 --- 2 files changed,

Re: [PATCH 1/2] target/riscv: check 'I' and 'E' after checking 'G' in riscv_cpu_realize

On Mon, May 16, 2022 at 1:36 PM Weiwei Li wrote: > > - setting ext_g will implicitly set ext_i > > Signed-off-by: Weiwei Li > Signed-off-by: Junqiang Wang > --- > slirp | 2 +- > target/riscv/cpu.c | 23 --- > 2 files changed, 13 insertions(+), 12 deletions(-)

[PATCH 1/2] target/riscv: check 'I' and 'E' after checking 'G' in riscv_cpu_realize

- setting ext_g will implicitly set ext_i Signed-off-by: Weiwei Li Signed-off-by: Junqiang Wang --- slirp | 2 +- target/riscv/cpu.c | 23 --- 2 files changed, 13 insertions(+), 12 deletions(-) diff --git a/slirp b/slirp index 9d59bb775d..a88d9ace23 16 --