Re: [PATCH 1/2] hw/char/renesas_sci: Add fifo buffer to backend interface.

2022-02-03 Thread Yoshinori Sato
On Wed, 02 Feb 2022 03:54:45 +0900, Peter Maydell wrote: > > On Tue, 1 Feb 2022 at 17:47, Yoshinori Sato > wrote: > > > > On Tue, 01 Feb 2022 15:48:58 +0900, > > Thomas Huth wrote: > > > > > > On 31/01/2022 10.42, Yoshinori Sato wrote: > > > If you describe it like this, it sounds like you're no

Re: [PATCH 1/2] hw/char/renesas_sci: Add fifo buffer to backend interface.

2022-02-01 Thread Peter Maydell
On Tue, 1 Feb 2022 at 17:47, Yoshinori Sato wrote: > > On Tue, 01 Feb 2022 15:48:58 +0900, > Thomas Huth wrote: > > > > On 31/01/2022 10.42, Yoshinori Sato wrote: > > If you describe it like this, it sounds like you're now emulating a > > buffer that is not there with real hardware? Is that really

Re: [PATCH 1/2] hw/char/renesas_sci: Add fifo buffer to backend interface.

2022-02-01 Thread Yoshinori Sato
On Tue, 01 Feb 2022 15:48:58 +0900, Thomas Huth wrote: > > On 31/01/2022 10.42, Yoshinori Sato wrote: > > SCI does not have a fifo, it is necessary to send and receive > > at a bit rate speed. > > But, qemu's chardev backend does not have a buffer, > > so it sends received data continuously. >

Re: [PATCH 1/2] hw/char/renesas_sci: Add fifo buffer to backend interface.

2022-01-31 Thread Thomas Huth
On 31/01/2022 10.42, Yoshinori Sato wrote: SCI does not have a fifo, it is necessary to send and receive at a bit rate speed. But, qemu's chardev backend does not have a buffer, so it sends received data continuously. By buffering the received data with the FIFO, continuous received data ca

[PATCH 1/2] hw/char/renesas_sci: Add fifo buffer to backend interface.

2022-01-31 Thread Yoshinori Sato
SCI does not have a fifo, it is necessary to send and receive at a bit rate speed. But, qemu's chardev backend does not have a buffer, so it sends received data continuously. By buffering the received data with the FIFO, continuous received data can be received. Signed-off-by: Yoshinori Sato -