[RESEND PATCH 06/10] usb/uhci: Add aspeed specific read and write functions

2024-11-12 Thread Guenter Roeck
Aspeed uses non-standard UHCI register addresses. On top of that, registers are 32 bit wide instead of 16 bit. Map Aspeed UHCI addresses to standard UHCI addresses and where needed combine/split 32 bit accesses to solve the problem. In addition to that, Aspeed SoCs starting with AST2600 support a

[PATCH 06/10] usb/uhci: Add aspeed specific read and write functions

2024-11-12 Thread Guenter Roeck
Aspeed uses non-standard UHCI register addresses. On top of that, registers are 32 bit wide instead of 16 bit. Map Aspeed UHCI addresses to standard UHCI addresses and where needed combine/split 32 bit accesses to solve the problem. In addition to that, Aspeed SoCs starting with AST2600 support a