On 11/16/20 8:08 AM, Peter Maydell wrote:
> In v8.1M the new CLRM instruction allows zeroing an arbitrary set of
> the general-purpose registers and APSR. Implement this.
>
> The encoding is a subset of the LDMIA T2 encoding, using what would
> be Rn=0b (which UNDEFs for LDMIA).
>
> Signed-o
In v8.1M the new CLRM instruction allows zeroing an arbitrary set of
the general-purpose registers and APSR. Implement this.
The encoding is a subset of the LDMIA T2 encoding, using what would
be Rn=0b (which UNDEFs for LDMIA).
Signed-off-by: Peter Maydell
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target/arm/t32.decode | 6 +
