On 12/15/20 5:38 PM, Philippe Mathieu-Daudé wrote:
> BTW (nitpicking) I'd rewrite the epilogue as:
>
> if (!in_32) {
> tcg_temp_free_i32(t_val);
> }
> tcg_temp_free_ptr(t_size);
>
> tcg_temp_free_ptr(t_ptr);
> return;
>
> t_val first, because t
On 12/15/20 6:48 PM, Richard Henderson wrote:
> In f47db80cc07, we handled odd-sized tail clearing for
> the case of hosts that have vector operations, but did
> not handle the case of hosts that do not have vector ops.
>
> This was ok until e2e7168a214b, which changed the encoding
> of simd_desc
In f47db80cc07, we handled odd-sized tail clearing for
the case of hosts that have vector operations, but did
not handle the case of hosts that do not have vector ops.
This was ok until e2e7168a214b, which changed the encoding
of simd_desc such that the odd sizes are impossible.
Add memset as a t
