On 2/4/25 04:43, Git wrote:
Thank you Richard for noticing the issue.
I have been able to create tests that show the malfunction of the FsTOx instruction as
well. I am however not yet able to prove(through tests) the malfunction of the FxTO{s,d,q}
instructions.
Destination register 32 should
Thank you Richard for noticing the issue.
I have been able to create tests that show the malfunction of the FsTOx
instruction as well. I am however not yet able to prove(through tests) the
malfunction of the FxTO{s,d,q} instructions.
Based on the fact that the source registers are 64 bit, a sim
On 2/3/25 06:01, Mikael Szreder wrote:
A bug was introduced in commit 0bba7572d40d which causes the fdtox and
fqtox instructions to incorrectly select the destination registers.
More information and a test program can be found in issue #2802.
Fixes: 0bba7572d40d ("target/sparc: Perform DFPREG/
A bug was introduced in commit 0bba7572d40d which causes the fdtox and
fqtox instructions to incorrectly select the destination registers.
More information and a test program can be found in issue #2802.
Fixes: 0bba7572d40d ("target/sparc: Perform DFPREG/QFPREG in decodetree")
Resolves: https://g
