Re: [PATCH] target/riscv: support cache-related PMU events in virtual mode

On Wed, Nov 23, 2022 at 7:07 PM Jim Shu wrote: > > let tlb_fill() function also increments PMU counter when it is from > two-stage translation, so QEMU could also monitor these PMU events when > CPU runs in VS/VU mode (like running guest OS). > > Signed-off-by: Jim Shu Thanks! Applied to riscv-

Re: [PATCH] target/riscv: support cache-related PMU events in virtual mode

On Wed, Nov 23, 2022 at 7:07 PM Jim Shu wrote: > > let tlb_fill() function also increments PMU counter when it is from > two-stage translation, so QEMU could also monitor these PMU events when > CPU runs in VS/VU mode (like running guest OS). > > Signed-off-by: Jim Shu Reviewed-by: Alistair Fran

[PATCH] target/riscv: support cache-related PMU events in virtual mode

let tlb_fill() function also increments PMU counter when it is from two-stage translation, so QEMU could also monitor these PMU events when CPU runs in VS/VU mode (like running guest OS). Signed-off-by: Jim Shu --- target/riscv/cpu_helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)