Re: [PATCH] target/riscv: Prevent lost illegal instruction exceptions

2021-03-19 Thread Richard Henderson
On 3/16/21 9:03 AM, Georg Kotheimer wrote: When decode_insn16() fails, we fall back to decode_RV32_64C() for further compressed instruction decoding. I think this is all dead code now. Certainly c.ld/c.sd are in insn16-64.decode and c.flw/c.fsw are in insn16-32.decode. Digging, we failed to

Re: [PATCH] target/riscv: Prevent lost illegal instruction exceptions

2021-03-19 Thread Alistair Francis
On Tue, Mar 16, 2021 at 11:05 AM Georg Kotheimer wrote: > > When decode_insn16() fails, we fall back to decode_RV32_64C() for > further compressed instruction decoding. However, prior to this change, > we did not raise an illegal instruction exception, if decode_RV32_64C() > fails to decode the in

[PATCH] target/riscv: Prevent lost illegal instruction exceptions

2021-03-16 Thread Georg Kotheimer
When decode_insn16() fails, we fall back to decode_RV32_64C() for further compressed instruction decoding. However, prior to this change, we did not raise an illegal instruction exception, if decode_RV32_64C() fails to decode the instruction. This means that we skipped illegal compressed instructio