Re: [PATCH] target/riscv: Fix vill field write in vtype

2022-02-01 Thread Alistair Francis
On Tue, Feb 1, 2022 at 5:08 PM LIU Zhiwei wrote: > > The guest should be able to set the vill bit as part of vsetvl. > > Currently we may set env->vill to 1 in the vsetvl helper, but there > is nowhere that we set it to 0, so once it transitions to 1 it's stuck > there until the system is reset. >

Re: [PATCH] target/riscv: Fix vill field write in vtype

2022-02-01 Thread Richard Henderson
On 2/1/22 17:46, LIU Zhiwei wrote: The guest should be able to set the vill bit as part of vsetvl. Currently we may set env->vill to 1 in the vsetvl helper, but there is nowhere that we set it to 0, so once it transitions to 1 it's stuck there until the system is reset. Signed-off-by: LIU Zhiwe

[PATCH] target/riscv: Fix vill field write in vtype

2022-01-31 Thread LIU Zhiwei
The guest should be able to set the vill bit as part of vsetvl. Currently we may set env->vill to 1 in the vsetvl helper, but there is nowhere that we set it to 0, so once it transitions to 1 it's stuck there until the system is reset. Signed-off-by: LIU Zhiwei --- target/riscv/vector_helper.c