Haha, fair enough. I just copied that line from one of the other functions
in that file, which all use the same style. The check is actually a bit
worse than it looks because PRV_S is defined to be 1. Hence, the whole
thing is equivalent to just writing `env->priv == PRV_U`. I can send out a
new ve
On 1/23/20 9:52 AM, Jonathan Behrens wrote:
> +if (!(env->priv >= PRV_S) ||
For integers, !(x >= y) is a poor way to write x < y.
r~
>From the RISC-V Priviliged Specification:
"When S-mode is implemented, then executing WFI in U-mode causes an illegal
instruction exception, unless it completes within an implementation-specific,
bounded time limit. A future revision of this specification might add a feature
that allows S-mode to
On Wed, Jan 22, 2020 at 12:15 AM Jonathan Behrens wrote:
>
> I don't think this was ever merged?
I don't think so either. Can you send a new version of the patch with
my Reviewed by and an updated commit message and CC Palmers new
address at Google?
Alistair
>
> On Wed, Jul 3, 2019 at 10:37 PM
I don't think this was ever merged?
On Wed, Jul 3, 2019 at 10:37 PM wrote:
> Patchew URL:
> https://patchew.org/QEMU/20190703190715.5328-1-jonat...@fintelia.io/
>
>
>
> Hi,
>
> This series failed the asan build test. Please find the testing commands
> and
> their output below. If you have Docker
Patchew URL:
https://patchew.org/QEMU/20190703190715.5328-1-jonat...@fintelia.io/
Hi,
This series failed the asan build test. Please find the testing commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT BEGIN ===
#!/bin/bash
mak
On Wed, Jul 3, 2019 at 12:07 PM Jonathan Behrens wrote:
>
> Signed-off-by: Jonathan Behrens
>From the text in the spec it sounds like it should be an illegal
instruction exception, at least for now (see below). Maybe it's worth
mentioning in the commit that WFI in U-Mode is allowed if it complet
Signed-off-by: Jonathan Behrens
---
target/riscv/op_helper.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/target/riscv/op_helper.c b/target/riscv/op_helper.c
index 331cc36232..2e5a980192 100644
--- a/target/riscv/op_helper.c
+++ b/target/riscv/op_helper.c
@@ -129,10
