From: Richard Henderson
> On 6/2/21 1:55 AM, David Gibson wrote:
> > On Tue, Jun 01, 2021 at 01:27:20PM -0700, Richard Henderson wrote:
> >> On 6/1/21 11:02 AM, Luis Pires wrote:
> >>> +if (is_jmp == DISAS_EXIT || is_jmp == DISAS_CHAIN) {
> >>> +/* We have not updated n
On 6/2/21 1:55 AM, David Gibson wrote:
On Tue, Jun 01, 2021 at 01:27:20PM -0700, Richard Henderson wrote:
On 6/1/21 11:02 AM, Luis Pires wrote:
+if (is_jmp == DISAS_EXIT || is_jmp == DISAS_CHAIN) {
+/* We have not updated nip yet, so do it now */
+gen
On Tue, Jun 01, 2021 at 01:27:20PM -0700, Richard Henderson wrote:
> On 6/1/21 11:02 AM, Luis Pires wrote:
> > +if (is_jmp == DISAS_EXIT || is_jmp == DISAS_CHAIN) {
> > +/* We have not updated nip yet, so do it now */
> > +gen_update_nip(ctx, nip);
> > +
On 6/1/21 11:02 AM, Luis Pires wrote:
+if (is_jmp == DISAS_EXIT || is_jmp == DISAS_CHAIN) {
+/* We have not updated nip yet, so do it now */
+gen_update_nip(ctx, nip);
+}
This is incorrect. Both EXIT and CHAIN *have* updated nip, but to s
Commit 6086c75 (target/ppc: Replace POWERPC_EXCP_BRANCH with
DISAS_NORETURN) broke the generation of exceptions when
CPU_SINGLE_STEP or CPU_BRANCH_STEP were set, due to nip always being
reset to the address of the current instruction.
This fix leaves nip untouched when generating the exception.
Si
