On 1/21/22 10:31, Vitaly Cheptsov wrote:
Book-E architecture does not set the error code in 31:27 bits
of SRR1, but instead uses these bits for custom fields such
as GS (Guest Supervisor).
Wrongly setting these fields will result in QEMU crashes
when attempting to execute not executable code due
Hi Cédric,
> and the default ppce500 machine has enough devices for the purpose ?
We cannot test much without a predictable timer emulation on QEMU, sometimes we
have fairly random freezes, but otherwise the basics work ok. I will let you
know in case we find something more or less reproducible
Hello Vitaly,
On 1/21/22 10:33, Vitaly Cheptsov wrote:
Hi Cédric,
This looks correct and even fixing an issue that Mario reported
on the TCG e6500 CPU with a kernel + KVM compiled in :
https://lore.kernel.org/all/R5JFVM$911e343ff81933b99d53fd0992d88...@locati.it/
KVM has some issues also w
Hi Cédric,
> This looks correct and even fixing an issue that Mario reported
> on the TCG e6500 CPU with a kernel + KVM compiled in :
>
>
> https://lore.kernel.org/all/R5JFVM$911e343ff81933b99d53fd0992d88...@locati.it/
>
> KVM has some issues also with the e6500 but that's another problem
> I
Book-E architecture does not set the error code in 31:27 bits
of SRR1, but instead uses these bits for custom fields such
as GS (Guest Supervisor).
Wrongly setting these fields will result in QEMU crashes
when attempting to execute not executable code due to the attempts
to use Guest Supervisor mo
Hello Vitaly
On 1/21/22 01:02, Vitaly Cheptsov wrote:
Hello,
PowerPC e500mc defines MSR bit 35 differently from most other PowerPC variants.
In particular, for e500mc this is GS (Guest Supervisor) bit[1], while for
others it is NOEXEC GUARD bit[2].
QEMU ignores this architectural difference w