Re: [PATCH] target/mips: Allow executing MSA instructions on Loongson-3A4000

2020-12-07 Thread Philippe Mathieu-Daudé
On 11/30/20 11:22 AM, Philippe Mathieu-Daudé wrote: > The Loongson-3A4000 is a GS464V-based processor with MIPS MSA ASE: > https://www.mail-archive.com/qemu-devel@nongnu.org/msg763059.html > > Commit af868995e1b correctly set the 'MSA present' bit of Config3 > register, but forgot to allow the MSA

Re: [PATCH] target/mips: Allow executing MSA instructions on Loongson-3A4000

2020-12-01 Thread chen huacai
Reviewed-by: Huacai Chen On Tue, Dec 1, 2020 at 2:24 AM Richard Henderson wrote: > > On 11/30/20 4:22 AM, Philippe Mathieu-Daudé wrote: > > The Loongson-3A4000 is a GS464V-based processor with MIPS MSA ASE: > > https://www.mail-archive.com/qemu-devel@nongnu.org/msg763059.html > > > > Commit af86

Re: [PATCH] target/mips: Allow executing MSA instructions on Loongson-3A4000

2020-11-30 Thread Richard Henderson
On 11/30/20 4:22 AM, Philippe Mathieu-Daudé wrote: > The Loongson-3A4000 is a GS464V-based processor with MIPS MSA ASE: > https://www.mail-archive.com/qemu-devel@nongnu.org/msg763059.html > > Commit af868995e1b correctly set the 'MSA present' bit of Config3 > register, but forgot to allow the MSA

[PATCH] target/mips: Allow executing MSA instructions on Loongson-3A4000

2020-11-30 Thread Philippe Mathieu-Daudé
The Loongson-3A4000 is a GS464V-based processor with MIPS MSA ASE: https://www.mail-archive.com/qemu-devel@nongnu.org/msg763059.html Commit af868995e1b correctly set the 'MSA present' bit of Config3 register, but forgot to allow the MSA instructions decoding in insn_flags, so executing them trigge