Re: [PATCH] target/hppa: Move iaoq registers and thus reduce generated code size

On 30/7/23 18:30, Helge Deller wrote: On hppa the Instruction Address Offset Queue (IAOQ) registers specifies the next to-be-executed instructions addresses. Each generated TB writes those registers at least once, so those registers are used heavily in generated code. Looking at the generated as

Re: [PATCH] target/hppa: Move iaoq registers and thus reduce generated code size

On 7/30/23 09:30, Helge Deller wrote: On hppa the Instruction Address Offset Queue (IAOQ) registers specifies the next to-be-executed instructions addresses. Each generated TB writes those registers at least once, so those registers are used heavily in generated code. Looking at the generated as

[PATCH] target/hppa: Move iaoq registers and thus reduce generated code size

On hppa the Instruction Address Offset Queue (IAOQ) registers specifies the next to-be-executed instructions addresses. Each generated TB writes those registers at least once, so those registers are used heavily in generated code. Looking at the generated assembly, for a x86-64 host this code to w