On 2022/05/06 1:13, Richard Henderson wrote:
On 5/4/22 22:12, m...@sfc.wide.ad.jp wrote:
From: Keisuke Iida
The maximum IPA size('inputsize') is constrained by the implemented
PA size that is
specified by ID_AA64MMFR0_EL1.PARange. Please reference Arm
Architecture Reference
Manual for A-pro
On 5/4/22 22:12, m...@sfc.wide.ad.jp wrote:
From: Keisuke Iida
The maximum IPA size('inputsize') is constrained by the implemented PA size
that is
specified by ID_AA64MMFR0_EL1.PARange. Please reference Arm Architecture
Reference
Manual for A-profile architecture "Supported IPA size" on page
Address Translation Fault is triggered when PA size set by VTCR_EL2.PS is less than IPA
size set by VTCR_EL2.T0SZ on the guest. (e.g. vtcr_el2.PS = 1 && vtcr_el2.T0SZ
= 25. PA size is 36bit, and IPA size is 39bit.)
ps = FIELD_EX64(cpu->isar.id_aa64mmfr0, ID_AA64MMFR0, PARANGE);
On Thu, 5 May 2022 at 01:40, wrote:
>
> From: Keisuke Iida
>
> The maximum IPA size('inputsize') is constrained by the implemented PA size
> that is
> specified by ID_AA64MMFR0_EL1.PARange. Please reference Arm Architecture
> Reference
> Manual for A-profile architecture "Supported IPA size" on
From: Keisuke Iida
The maximum IPA size('inputsize') is constrained by the implemented PA size
that is
specified by ID_AA64MMFR0_EL1.PARange. Please reference Arm Architecture
Reference
Manual for A-profile architecture "Supported IPA size" on page D5-4788.
Signed-off-by: Keisuke Iida
---
ta
From: Keisuke Iida
The maximum IPA size('inputsize') is constrained by the implemented PA size
that is
specified by ID_AA64MMFR0_EL1.PARange. Please reference Arm Architecture
Reference
Manual for A-profile architecture "Supported IPA size" on page D5-4788.
Signed-off-by: Keisuke Iida
---
ta