Re: [PATCH] target/arm: fix IL bit for data abort exceptions

2019-12-20 Thread Peter Maydell
On Fri, 20 Dec 2019 at 13:53, Jeff Kubascik wrote: > > On 12/19/2019 7:43 AM, Peter Maydell wrote: > > On Wed, 18 Dec 2019 at 01:03, Richard Henderson > > wrote: > >> > >> On 12/17/19 11:02 AM, Jeff Kubascik wrote: > >>> diff --git a/target/arm/tlb_helper.c b/target/arm/tlb_helper.c > >>> index 5

Re: [PATCH] target/arm: fix IL bit for data abort exceptions

2019-12-20 Thread Jeff Kubascik
On 12/19/2019 7:43 AM, Peter Maydell wrote: > On Wed, 18 Dec 2019 at 01:03, Richard Henderson > wrote: >> >> On 12/17/19 11:02 AM, Jeff Kubascik wrote: >>> diff --git a/target/arm/tlb_helper.c b/target/arm/tlb_helper.c >>> index 5feb312941..e63f8bda29 100644 >>> --- a/target/arm/tlb_helper.c >>> +

Re: [PATCH] target/arm: fix IL bit for data abort exceptions

2019-12-19 Thread Richard Henderson
On 12/19/19 2:43 AM, Peter Maydell wrote: > I think this is a regression introduced in commit 46beb58efbb8a2a32 > when we converted the Thumb decoder over to decodetree. Before that > 16 bit Thumb insns were in a different place in the old decoder and > the 16-bit Thumb path passed ISSIs16Bit in wi

Re: [PATCH] target/arm: fix IL bit for data abort exceptions

2019-12-19 Thread Peter Maydell
On Wed, 18 Dec 2019 at 01:03, Richard Henderson wrote: > > On 12/17/19 11:02 AM, Jeff Kubascik wrote: > > diff --git a/target/arm/tlb_helper.c b/target/arm/tlb_helper.c > > index 5feb312941..e63f8bda29 100644 > > --- a/target/arm/tlb_helper.c > > +++ b/target/arm/tlb_helper.c > > @@ -44,7 +44,7 @@

Re: [PATCH] target/arm: fix IL bit for data abort exceptions

2019-12-17 Thread Richard Henderson
On 12/17/19 11:02 AM, Jeff Kubascik wrote: > diff --git a/target/arm/tlb_helper.c b/target/arm/tlb_helper.c > index 5feb312941..e63f8bda29 100644 > --- a/target/arm/tlb_helper.c > +++ b/target/arm/tlb_helper.c > @@ -44,7 +44,7 @@ static inline uint32_t merge_syn_data_abort(uint32_t > template_syn,

[PATCH] target/arm: fix IL bit for data abort exceptions

2019-12-17 Thread Jeff Kubascik
The Instruction Length bit of the Exception Syndrome Register was fixed to 1 for data aborts. This bit is used by the Xen hypervisor to determine how to increment the program counter after a mmio handler is successful and returns control back to the guest virtual machine. With this value fixed to 1