Re: [PATCH] target/arm: ensure we use current exception state after SCR update

2019-12-11 Thread Richard Henderson
On 12/9/19 6:37 AM, Alex Bennée wrote: > +/* Re-read the current EL, don't use cached values */ > #define ARM_CP_CURRENTEL (ARM_CP_SPECIAL | 0x0400) > #define ARM_CP_DC_ZVA(ARM_CP_SPECIAL | 0x0500) > #define ARM_LAST_SPECIAL ARM_CP_DC_ZVA ... > @@ -5179,7 +5179,7 @@ s

Re: [PATCH] target/arm: ensure we use current exception state after SCR update

2019-12-09 Thread no-reply
Patchew URL: https://patchew.org/QEMU/20191209143723.6368-1-alex.ben...@linaro.org/ Hi, This series failed the docker-quick@centos7 build test. Please find the testing commands and their output below. If you have Docker installed, you can probably reproduce it locally. === TEST SCRIPT BEGIN

Re: [PATCH] target/arm: ensure we use current exception state after SCR update

2019-12-09 Thread Philippe Mathieu-Daudé
On 12/9/19 3:37 PM, Alex Bennée wrote: A write to the SCR can change the effective EL by droppping the system from secure to non-secure mode. However if we use a cached current_el from before the change we'll rebuild the flags incorrectly. To fix this we overload the ARM_CP_CURRENTEL flag for the

[PATCH] target/arm: ensure we use current exception state after SCR update

2019-12-09 Thread Alex Bennée
A write to the SCR can change the effective EL by droppping the system from secure to non-secure mode. However if we use a cached current_el from before the change we'll rebuild the flags incorrectly. To fix this we overload the ARM_CP_CURRENTEL flag for the register and ensure the new EL is used w