On Sun, 15 Jan 2023 at 17:16, Richard Henderson
wrote:
>
> This is a 64-bit register on AArch64, even if the high 44 bits
> are RES0. Because this is defined as ARM_CP_STATE_BOTH, we are
> asserting that the cpreg field is 64-bits.
>
> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1400
This is a 64-bit register on AArch64, even if the high 44 bits
are RES0. Because this is defined as ARM_CP_STATE_BOTH, we are
asserting that the cpreg field is 64-bits.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1400
Signed-off-by: Richard Henderson
---
During my perigrinations of
