On Sat, 21 Aug 2021 at 19:59, Richard Henderson
wrote:
>
> > +static inline uint32_t syn_illegalstate(void)
> > +{
> > +return EC_ILLEGALSTATE << ARM_EL_EC_SHIFT;
> > +}
>
> I just noticed this should have the IL bit set.
Yep. (I remembered about that for the BXJ trap in the other patch,
but
> +static inline uint32_t syn_illegalstate(void)
> +{
> +return EC_ILLEGALSTATE << ARM_EL_EC_SHIFT;
> +}
I just noticed this should have the IL bit set.
r~
On 8/17/21 6:21 AM, Peter Maydell wrote:
In v8A, the PSTATE.IL bit is set for various kinds of illegal
exception return or mode-change attempts. We already set PSTATE.IL
(or its AArch32 equivalent CPSR.IL) in all those cases, but we
weren't implementing the part of the behaviour where attempting
In v8A, the PSTATE.IL bit is set for various kinds of illegal
exception return or mode-change attempts. We already set PSTATE.IL
(or its AArch32 equivalent CPSR.IL) in all those cases, but we
weren't implementing the part of the behaviour where attempting to
execute an instruction with PSTATE.IL t
