Re: [PATCH] riscv: Add helper to make NaN-boxing for FP register

2020-01-27 Thread Ian Jiang
The patch description is modified and a new version is committed. -- Ian Jiang Richard Henderson 于2020年1月28日周二 上午1:38写道： > > On 1/27/20 6:10 AM, Ian Jiang wrote: > > The function that makes NaN-boxing when a 32-bit value is assigned > > to a 64-bit FP register is split out to a helper gen_nanbox_

Re: [PATCH] riscv: Add helper to make NaN-boxing for FP register

2020-01-27 Thread Alistair Francis
On Mon, Jan 27, 2020 at 6:11 AM Ian Jiang wrote: > > The function that makes NaN-boxing when a 32-bit value is assigned > to a 64-bit FP register is split out to a helper gen_nanbox_fpr(). > Then it is applied in translating of the FLW instruction. > > This also applies for other instructions when

Re: [PATCH] riscv: Add helper to make NaN-boxing for FP register

2020-01-27 Thread Richard Henderson
On 1/27/20 6:10 AM, Ian Jiang wrote: > The function that makes NaN-boxing when a 32-bit value is assigned > to a 64-bit FP register is split out to a helper gen_nanbox_fpr(). > Then it is applied in translating of the FLW instruction. > > This also applies for other instructions when the RVD exten

[PATCH] riscv: Add helper to make NaN-boxing for FP register

2020-01-27 Thread Ian Jiang
The function that makes NaN-boxing when a 32-bit value is assigned to a 64-bit FP register is split out to a helper gen_nanbox_fpr(). Then it is applied in translating of the FLW instruction. This also applies for other instructions when the RVD extension is present, such as FMV.W.W, FADD.S, FSUB.