Re: [PATCH] hw/riscv: sifive_u: Make sure firmware info is 8-byte aligned

2021-07-08 Thread Alistair Francis
On Fri, Jul 9, 2021 at 12:33 AM Bin Meng wrote: > > Currently the firmware dynamic info (fw_dyn) is put right after > the reset vector, which is not 8-byte aligned on RV64. OpenSBI > fw_dynamic uses ld to read contents from 'struct fw_dynamic_info', > which expects fw_dyn to be on the 8-byte bound

Re: [PATCH] hw/riscv: sifive_u: Make sure firmware info is 8-byte aligned

2021-07-08 Thread Alistair Francis
On Fri, Jul 9, 2021 at 12:33 AM Bin Meng wrote: > > Currently the firmware dynamic info (fw_dyn) is put right after > the reset vector, which is not 8-byte aligned on RV64. OpenSBI > fw_dynamic uses ld to read contents from 'struct fw_dynamic_info', > which expects fw_dyn to be on the 8-byte bound

[PATCH] hw/riscv: sifive_u: Make sure firmware info is 8-byte aligned

2021-07-08 Thread Bin Meng
Currently the firmware dynamic info (fw_dyn) is put right after the reset vector, which is not 8-byte aligned on RV64. OpenSBI fw_dynamic uses ld to read contents from 'struct fw_dynamic_info', which expects fw_dyn to be on the 8-byte boundary, otherwise the misaligned load exception may happen. Fo