Re: [PATCH] hw/riscv: sifive_u: Add UART1 DT node in the generated DTB

2020-11-11 Thread Alistair Francis
On Wed, Nov 11, 2020 at 1:48 AM Anup Patel wrote: > > The sifive_u machine emulates two UARTs but we have only UART0 DT > node in the generated DTB so this patch adds UART1 DT node in the > generated DTB. > > Signed-off-by: Anup Patel Thanks! Applied to riscv-to-apply.next Alistair > --- > h

Re: [PATCH] hw/riscv: sifive_u: Add UART1 DT node in the generated DTB

2020-11-11 Thread Alistair Francis
On Wed, Nov 11, 2020 at 1:48 AM Anup Patel wrote: > > The sifive_u machine emulates two UARTs but we have only UART0 DT > node in the generated DTB so this patch adds UART1 DT node in the > generated DTB. > > Signed-off-by: Anup Patel Reviewed-by: Alistair Francis Alistair > --- > hw/riscv/s

[PATCH] hw/riscv: sifive_u: Add UART1 DT node in the generated DTB

2020-11-11 Thread Anup Patel
The sifive_u machine emulates two UARTs but we have only UART0 DT node in the generated DTB so this patch adds UART1 DT node in the generated DTB. Signed-off-by: Anup Patel --- hw/riscv/sifive_u.c | 15 +++ 1 file changed, 15 insertions(+) diff --git a/hw/riscv/sifive_u.c b/hw/riscv