Re: [PATCH] e1000e: Add ICR clearing by corresponding IMS bit

2023-06-29 Thread Jason Wang
On Thu, Jun 29, 2023 at 4:53 PM Akihiko Odaki wrote: > > On 2023/06/02 16:25, Akihiko Odaki wrote: > > The datasheet does not say what happens when interrupt was asserted > > (ICR.INT_ASSERT=1) and auto mask is *not* active. > > However, section of 13.3.27 the PCIe* GbE Controllers Open Source > >

Re: [PATCH] e1000e: Add ICR clearing by corresponding IMS bit

2023-06-29 Thread Akihiko Odaki
On 2023/06/02 16:25, Akihiko Odaki wrote: The datasheet does not say what happens when interrupt was asserted (ICR.INT_ASSERT=1) and auto mask is *not* active. However, section of 13.3.27 the PCIe* GbE Controllers Open Source Software Developer’s Manual, which were written for older devices, name

Re: [Intel-wired-lan] [PATCH] e1000e: Add ICR clearing by corresponding IMS bit

2023-06-02 Thread Paul Menzel
[Removed bpoir...@suse.com from Cc: again.] Am 02.06.23 um 11:41 schrieb Paul Menzel: Dear Akihiko, Thank you for your patch. After looking at the diff, it looks like this is a QEMU patch, and not one for the Linux kernel. I leave my inline comments anyway. Am 02.06.23 um 09:25 schrieb Ak

Re: [Intel-wired-lan] [PATCH] e1000e: Add ICR clearing by corresponding IMS bit

2023-06-02 Thread Paul Menzel
Dear Akihiko, Thank you for your patch. After looking at the diff, it looks like this is a QEMU patch, and not one for the Linux kernel. I leave my inline comments anyway. Am 02.06.23 um 09:25 schrieb Akihiko Odaki: It’d be nice if you started by summarizing the bug. The datasheet does n

[PATCH] e1000e: Add ICR clearing by corresponding IMS bit

2023-06-02 Thread Akihiko Odaki
The datasheet does not say what happens when interrupt was asserted (ICR.INT_ASSERT=1) and auto mask is *not* active. However, section of 13.3.27 the PCIe* GbE Controllers Open Source Software Developer’s Manual, which were written for older devices, namely 631xESB/632xESB, 82563EB/82564EB, 82571EB