Re: [PATCH] RISC-V: Increase max vlen to 4096

2023-12-05 Thread Alistair Francis
On Tue, Nov 28, 2023 at 3:09 AM Patrick O'Neill wrote: > > Hi Phil, > > On 11/23/23 02:21, Philippe Mathieu-Daudé wrote: > > Hi Patrick, > > > > On 23/11/23 01:17, Patrick O'Neill wrote: > >> QEMU currently limits the max vlenb to 1024. GCC sets the upper bound > >> to 4096 [1]. There doesn't seem

Re: [PATCH] RISC-V: Increase max vlen to 4096

2023-11-27 Thread Patrick O'Neill
Hi Phil, On 11/23/23 02:21, Philippe Mathieu-Daudé wrote: Hi Patrick, On 23/11/23 01:17, Patrick O'Neill wrote: QEMU currently limits the max vlenb to 1024. GCC sets the upper bound to 4096 [1]. There doesn't seem to be an upper bound set by the spec [2] so this patch just changes QEMU to matc

Re: [PATCH] RISC-V: Increase max vlen to 4096

2023-11-23 Thread Philippe Mathieu-Daudé
Hi Patrick, On 23/11/23 01:17, Patrick O'Neill wrote: QEMU currently limits the max vlenb to 1024. GCC sets the upper bound to 4096 [1]. There doesn't seem to be an upper bound set by the spec [2] so this patch just changes QEMU to match GCC's upper bound. [1] https://github.com/gcc-mirror/gcc

[PATCH] RISC-V: Increase max vlen to 4096

2023-11-22 Thread Patrick O'Neill
QEMU currently limits the max vlenb to 1024. GCC sets the upper bound to 4096 [1]. There doesn't seem to be an upper bound set by the spec [2] so this patch just changes QEMU to match GCC's upper bound. [1] https://github.com/gcc-mirror/gcc/blob/5d2a360f0a541646abb11efdbabc33c6a04de7ee/gcc/testsu