rs when linking under OSX Mojave and Big Sur.
Signed-off-by: Peer Adelt
---
plugins/qemu-plugins.symbols | 3 ---
1 file changed, 3 deletions(-)
diff --git a/plugins/qemu-plugins.symbols b/plugins/qemu-plugins.symbols
index 4bdb381f48..40b4ff3821 100644
--- a/plugins/qemu-plugins.symbols
+++ b/p
tinued to search for the error in the QEMU HTIF device. But in fact
it was due to the wrong binary.
Thanks a lot! :-)
> On 16. Oct 2020, at 20:03, Alistair Francis wrote:
>
> On Fri, Oct 16, 2020 at 7:59 AM Peer Adelt wrote:
>>
>> Hi,
>>
>> I have a problem wi
nel Version 18.7.0)
- Compiler: Latest SiFive Build for GCC under OSX
- Command: qemu-system-riscv32 -M spike -nographic -bios none -kernel
Best regards,
Peer Adelt
From: Peer Adelt
Multiplies D[a] and D[b] and adds/subtracts the result to/from D[d].
The result is put in D[c]. All operands are floating-point numbers.
Signed-off-by: Peer Adelt
---
target-tricore/fpu_helper.c | 80 +
target-tricore/helper.h
From: Peer Adelt
Puts the content of data register D[a] into E[c][63:32] and the
content of data register D[b] into E[c][31:0].
Signed-off-by: Peer Adelt
---
target-tricore/translate.c | 15 +++
target-tricore/tricore-opcodes.h | 1 +
2 files changed, 16 insertions(+)
diff
From: Peer Adelt
This patch set contains 5 new instructions:
- FTOUZ (converts float to unsigned int, rounds towards zero)
- MADD.F / MSUB.F (multiplies two floats and adds/subtracts result
to/from the third operand)
- MOV (new variant in RR format - see ISA v1.6 for
From: Peer Adelt
Converts a 32-bit floating point number to an unsigned int. The
result is rounded towards zero.
Signed-off-by: Peer Adelt
Reviewed-by: Bastian Koppelmann
---
target-tricore/fpu_helper.c | 20
target-tricore/helper.h | 1 +
target-tricore
From: Peer Adelt
If D[15] is != sign_ext(const4) then PC will be set to (PC +
zero_ext(disp4 + 16)).
Signed-off-by: Peer Adelt
---
target-tricore/translate.c | 16
target-tricore/tricore-opcodes.h | 2 ++
2 files changed, 18 insertions(+)
diff --git a/target-tricore
From: Peer Adelt
If D[15] is != sign_ext(const4) then PC will be set to (PC +
zero_ext(disp4 + 16)).
Signed-off-by: Peer Adelt
---
target-tricore/translate.c | 11 +++
target-tricore/tricore-opcodes.h | 1 +
2 files changed, 12 insertions(+)
diff --git a/target-tricore
From: Peer Adelt
Puts the content of data register D[a] into E[c][63:32] and the
content of data register D[b] into E[c][31:0].
Signed-off-by: Peer Adelt
---
target-tricore/translate.c | 8
target-tricore/tricore-opcodes.h | 1 +
2 files changed, 9 insertions(+)
diff --git a
From: Peer Adelt
If D[15] is != sign_ext(const4) then PC will be set to (PC +
zero_ext(disp4 + 16)).
Signed-off-by: Peer Adelt
---
target-tricore/translate.c | 1 +
target-tricore/tricore-opcodes.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/target-tricore/translate.c b/target
From: Peer Adelt
This patch set contains 5 new instructions:
- FTOUZ (converts float to unsigned int, rounds towards zero)
- MADD.F / MSUB.F (multiplies two floats and adds/subtracts result
to/from the third operand)
- MOV (new variant in RR format - see ISA v1.6 for details
From: Peer Adelt
Converts a 32-bit floating point number to an unsigned int. The
result is rounded towards zero.
Signed-off-by: Peer Adelt
---
target-tricore/fpu_helper.c | 20
target-tricore/helper.h | 1 +
target-tricore/translate.c | 3 +++
3 files changed, 24
From: Peer Adelt
Multiplies D[a] and D[b] and adds/subtracts the result to/from D[d].
The result is put in D[c]. All operands are floating-point numbers.
Signed-off-by: Peer Adelt
---
target-tricore/fpu_helper.c | 54 +
target-tricore/helper.h
From: Peer Adelt
Puts the content of data register D[a] into E[c][63:32] and the
content of data register D[b] into E[c][31:0].
Signed-off-by: Peer Adelt
---
target-tricore/translate.c | 4
target-tricore/tricore-opcodes.h | 1 +
2 files changed, 5 insertions(+)
diff --git a
: Peer Adelt
---
include/exec/gen-icount.h | 18 +
tcg-runtime.c | 99 +++
tcg/tcg-runtime.h | 4 ++
3 files changed, 121 insertions(+)
diff --git a/include/exec/gen-icount.h b/include/exec/gen-icount.h
index 05d89d3..0b8821b
The XML file contains a control flow graph, where each edge
is annotated with a context-dependent value. The parser reads
this information into a data structure within CPUState.
Signed-off-by: Peer Adelt
---
include/qom/cpu.h| 9 ++
include/tb-annotation/tb
On 14.01.2016 11:55, Peer Adelt wrote:
Hey guys :)
We have developed a generic concept to annotate TranslationBlocks during
runtime. The initial idea was to use it for time annotation with data from
static analysis tools. However, we have kept this approach as generic as
possible to allow other
This changeset activates the TranslationBlock annotation
mechanism for the QEMU system mode.
Signed-off-by: Peer Adelt
---
Makefile| 5 +++--
Makefile.objs | 4
Makefile.target | 4 +++-
configure | 13 +
qemu
on. During execution, the "value_sum" field of
the CPUState data structure will accumulate a total value of 70 (cycles).
Are there any comments? Is this in general a good idea to be added to upstream
QEMU?
All the best,
Peer
Peer Adelt (3):
tb-annotation: Added annotation XML fi
: Peer Adelt
---
include/exec/gen-icount.h | 18 +
tcg-runtime.c | 99 +++
tcg/tcg-runtime.h | 4 ++
3 files changed, 121 insertions(+)
diff --git a/include/exec/gen-icount.h b/include/exec/gen-icount.h
index 05d89d3..0b8821b
t;value_sum" field of the CPUState data structure will
accumulate a total value of 70 (cycles).
Are there any comments? Is this in general a good idea to be added to upstream
QEMU?
All the best,
Peer
Peer Adelt (3):
tb-annotation: Added annotation XML file parser
tb-annotation: Add
This changeset activates the TranslationBlock annotation
mechanism for the QEMU system mode.
Signed-off-by: Peer Adelt
---
Makefile| 5 +++--
Makefile.objs | 4
Makefile.target | 4 +++-
configure | 13 +
qemu
The XML file contains a control flow graph, where each edge
is annotated with a context-dependent value. The parser reads
this information into a data structure within CPUState.
Signed-off-by: Peer Adelt
---
include/qom/cpu.h| 9 ++
include/tb-annotation/tb
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