Re: [PATCH] linux-user: Expose risc-v V and H isa bit in get_elf_hwcap()

know that qemu currently implements rvv-1.0 and removes rvv-0.7.1. [1] https://github.com/sifive/qemu/commit/7a3e8e23b4cf1422ec48e9d4b4009337a05a635d best wishes nihui At 2022-05-05 00:05:31, "Palmer Dabbelt" wrote: >On Wed, 04 May 2022 08:10:03 PDT (-0700), alistai...@gmail.com

[PATCH] linux-user: Expose risc-v V and H isa bit in get_elf_hwcap()

This patch brings the optional risc-v vector and hypervisor bits in hwcap so that application could detect these isa support from /proc/self/auxv correctly in qemu userspace mode. Signed-off-by: Ni Hui --- linux-user/elfload.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a

[PATCH] target/mips: Fix store adress of high 64bit in helper_msa_st_b()

This patch fix the issue that helper_msa_st_b() write high 64bit data to where the low 64bit resides, leaving high 64bit undefined. Signed-off-by: Ni Hui --- target/mips/tcg/msa_helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/mips/tcg/msa_helper.c b/target/mip

[PATCH] target/mips: Fix FTRUNC_S and FTRUNC_U trans helper

Fix the FTRUNC_S and FTRUNC_U trans helper problem. Signed-off-by: nihui --- target/mips/tcg/msa_translate.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/mips/tcg/msa_translate.c b/target/mips/tcg/msa_translate.c index 0b3dd0957c..1bcdbb1121 100644 --- a/target

[PATCH 1/4] target/mips: Fix SAT_S trans helper

From: Ni Hui Fix the SAT_S and SAT_U trans helper confusion. Signed-off-by: Ni Hui --- target/mips/tcg/msa_translate.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/mips/tcg/msa_translate.c b/target/mips/tcg/msa_translate.c index 7576b3ed86..76307102f2 100644 --- a

[PATCH 2/4] target/mips: Fix df_extract_val() and df_extract_df() dfe lookup

From: Ni Hui Actually look into dfe structure data so that df_extract_val() and df_extract_df() can return immediate and datafield other than BYTE. Signed-off-by: Ni Hui --- target/mips/tcg/msa_translate.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/target/mips/tc

[PATCH 3/4] target/mips: Fix msa checking condition in trans_msa_elm_fn()

From: Ni Hui Fix issue that condition of check_msa_enabled(ctx) is reversed that causes segfault when msa elm_fn op encountered. Signed-off-by: Ni Hui --- target/mips/tcg/msa_translate.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/mips/tcg/msa_translate.c b/targe

[PATCH 4/4] target/mips: Do not treat msa INSERT as NOP when wd is zero

From: Ni Hui Only for msa COPY_U/COPY_S with wd zero, we treat it as NOP. Move this special rule into COPY_U and COPY_S trans function. Signed-off-by: Ni Hui --- target/mips/tcg/msa_translate.c | 15 ++- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/target/mips/tc