This new method will check if any pending interrupt was unmasked and
then call cpu_interrupt/cpu_reset_interrupt accordingly. Code that
raises/lowers or masks/unmasks interrupts should call this method to
keep CPU_INTERRUPT_HARD coherent with env->pending_interrupts.
Signed-off-by: Matheus Fe
Now that cs->interrupt_request indicates if there is any unmasked
interrupt, checking if the CPU has work to do can be simplified to a
single check that works for all CPU models.
Reviewed-by: Fabiano Rosas
Signed-off-by: Matheus Ferst
---
target/ppc/cpu_init.c |
Move the methods to excp_helper.c and make them static.
Reviewed-by: Fabiano Rosas
Signed-off-by: Matheus Ferst
---
target/ppc/cpu_init.c| 102 ---
target/ppc/excp_helper.c | 102 +++
target/ppc/internal.h| 6
This version fixes the problems found by Daniel with e500 tests and
rebases on ppc-next.
Based-on: https://gitlab.com/danielhb/qemu/-/tree/ppc-next
Matheus Ferst (3):
target/ppc: introduce ppc_maybe_interrupt
target/ppc: unify cpu->has_work based on cs->interrupt_request
target/ppc
Now that cs->interrupt_request indicates if there is any unmasked
interrupt, checking if the CPU has work to do can be simplified to a
single check that works for all CPU models.
Reviewed-by: Fabiano Rosas
Signed-off-by: Matheus Ferst
---
target/ppc/cpu_init.c |
Writes to LPCR are hypervisor privileged.
Signed-off-by: Matheus Ferst
---
target/ppc/cpu.c | 2 ++
target/ppc/cpu.h | 2 +-
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/target/ppc/cpu.c b/target/ppc/cpu.c
index 0ebac04bc4..e95b4c5ee1 100644
--- a/target/ppc/cpu.c
+++ b/target
The new method is identical to ppc_next_unmasked_interrupt_generic,
processor-specific code will be added/removed in the following patches.
Signed-off-by: Matheus Ferst
---
target/ppc/excp_helper.c | 114 +++
1 file changed, 114 insertions(+)
diff --git a
This new method will check if any pending interrupt was unmasked and
then call cpu_interrupt/cpu_reset_interrupt accordingly. Code that
raises/lowers or masks/unmasks interrupts should call this method to
keep CPU_INTERRUPT_HARD coherent with env->pending_interrupts.
Signed-off-by: Matheus Fe
Move the interrupt masking logic out of cpu_has_work_POWER8 in a new
method, p8_interrupt_powersave, that only returns an interrupt if it can
wake the processor from power-saving mode.
Signed-off-by: Matheus Ferst
---
target/ppc/cpu_init.c | 61 +++
1
;
Signed-off-by: Matheus Ferst
---
target/ppc/excp_helper.c | 50
1 file changed, 50 deletions(-)
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index 48c1b9f627..055f1de20e 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
Move the interrupt masking logic out of cpu_has_work_POWER7 in a new
method, p7_interrupt_powersave, that only returns an interrupt if it can
wake the processor from power-saving mode.
Signed-off-by: Matheus Ferst
---
target/ppc/cpu_init.c | 45 ---
1
Signed-off-by: Matheus Ferst
---
target/ppc/excp_helper.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index 662daad796..aaf1c95087 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@@ -2004,9 +2004,6 @@ static void
Move the methods to excp_helper.c and make them static.
Reviewed-by: Fabiano Rosas
Signed-off-by: Matheus Ferst
---
target/ppc/cpu_init.c| 102 ---
target/ppc/excp_helper.c | 102 +++
target/ppc/internal.h| 6
The new method is identical to ppc_deliver_interrupt, processor-specific
code will be added/removed in the following patches.
Signed-off-by: Matheus Ferst
---
target/ppc/excp_helper.c | 113 +++
1 file changed, 113 insertions(+)
diff --git a/target/ppc
Signed-off-by: Matheus Ferst
---
target/ppc/excp_helper.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index 055f1de20e..1c373c1a7c 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@@ -2077,9 +2077,6 @@ static void
Fixed Interval Timer: only defined
for embedded CPUs;
- Critical Doorbell: processor does not implement the
"Embedded.Processor Control" category;
- Programmable Interval Timer: 40x-only;
- PPC_INTERRUPT_THERM: only raised for 970 and POWER5p;
Signed-off-by: Matheus Ferst
---
v
Export p7_interrupt_powersave and use it in p7_next_unmasked_interrupt.
Signed-off-by: Matheus Ferst
---
target/ppc/cpu_init.c| 2 +-
target/ppc/excp_helper.c | 24
target/ppc/internal.h| 1 +
3 files changed, 14 insertions(+), 13 deletions(-)
diff --git a
;
Signed-off-by: Matheus Ferst
---
v3:
- Fixed method name in subject.
---
target/ppc/excp_helper.c | 63 +---
1 file changed, 8 insertions(+), 55 deletions(-)
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index 534c0f8f5c..a4d5fac37b 100644
--- a
Interval Timer: only defined
for embedded CPUs;
- Critical Doorbell: processor does not implement the "Embedded.Processor
Control" category;
- Programmable Interval Timer: 40x-only;
- PPC_INTERRUPT_THERM: only raised for 970 and POWER5p;
Signed-off-by: Matheus Ferst
---
v3:
- Keep
The new method is identical to ppc_deliver_interrupt, processor-specific
code will be added/removed in the following patches.
Signed-off-by: Matheus Ferst
---
target/ppc/excp_helper.c | 113 +++
1 file changed, 113 insertions(+)
diff --git a/target/ppc
Export p8_interrupt_powersave and use it in p8_next_unmasked_interrupt.
Signed-off-by: Matheus Ferst
---
target/ppc/cpu_init.c| 2 +-
target/ppc/excp_helper.c | 24
target/ppc/internal.h| 1 +
3 files changed, 14 insertions(+), 13 deletions(-)
diff --git a
Move the interrupt masking logic out of cpu_has_work_POWER9 in a new
method, p9_interrupt_powersave, that only returns an interrupt if it can
wake the processor from power-saving mode.
Signed-off-by: Matheus Ferst
---
target/ppc/cpu_init.c | 126 +-
1
The new method is identical to ppc_next_unmasked_interrupt_generic,
processor-specific code will be added/removed in the following patches.
Signed-off-by: Matheus Ferst
---
target/ppc/excp_helper.c | 114 +++
1 file changed, 114 insertions(+)
diff --git a
Export p9_interrupt_powersave and use it in p9_next_unmasked_interrupt.
Signed-off-by: Matheus Ferst
---
Putting the prototype in internal.h for a lack of better place. However,
we will un-export p9_interrupt_powersave in future patches, so it's only
temporary.
---
target/ppc/cpu_init.c
The new method is identical to ppc_deliver_interrupt, processor-specific
code will be added/removed in the following patches.
Signed-off-by: Matheus Ferst
---
target/ppc/excp_helper.c | 118 +++
1 file changed, 118 insertions(+)
diff --git a/target/ppc
Signed-off-by: Matheus Ferst
---
target/ppc/excp_helper.c | 9 +
1 file changed, 1 insertion(+), 8 deletions(-)
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index fb946385cc..fd9745c37e 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@@ -1919,18
Doorbell Interrupt: removed in Power ISA v3.0;
- Programmable Interval Timer: 40x-only.
Signed-off-by: Matheus Ferst
---
v3:
- Fixed method name in subject.
---
target/ppc/excp_helper.c | 42 +++-
1 file changed, 7 insertions(+), 35 deletions(-)
diff --git a
Signed-off-by: Matheus Ferst
---
target/ppc/excp_helper.c | 20 ++--
1 file changed, 18 insertions(+), 2 deletions(-)
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index f92b6c2b18..7d196d1581 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc
;
- Critical Doorbell Interrupt: removed in Power ISA v3.0;
- Programmable Interval Timer: 40x-only.
Signed-off-by: Matheus Ferst
---
target/ppc/excp_helper.c | 33 -
1 file changed, 33 deletions(-)
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index
The new method is identical to ppc_next_unmasked_interrupt_generic,
processor-specific code will be added/removed in the following patches.
Signed-off-by: Matheus Ferst
---
target/ppc/excp_helper.c | 119 +++
1 file changed, 119 insertions(+)
diff --git a
Split ppc_hw_interrupt into an interrupt masking method,
ppc_next_unmasked_interrupt, and an interrupt processing method,
ppc_deliver_interrupt.
Signed-off-by: Matheus Ferst
---
target/ppc/excp_helper.c | 207 +--
1 file changed, 131 insertions(+), 76
viewed-by: David Gibson
Signed-off-by: Matheus Ferst
---
hw/ppc/ppc.c | 10 +++---
hw/ppc/trace-events | 2 +-
target/ppc/cpu.h | 40 +++---
target/ppc/cpu_init.c| 56 +++---
target/ppc/excp_help
Use ppc_set_irq to raise/clear interrupts to ensure CPU_INTERRUPT_HARD
will be set/reset accordingly.
Reviewed-by: Fabiano Rosas
Signed-off-by: Matheus Ferst
---
target/ppc/excp_helper.c | 17 +++--
target/ppc/misc_helper.c | 9 ++---
2 files changed, 9 insertions(+), 17
problems pointed out by Fabiano on v2.
Matheus Ferst (29):
target/ppc: define PPC_INTERRUPT_* values directly
target/ppc: always use ppc_set_irq to set env->pending_interrupts
target/ppc: split interrupt masking and delivery from ppc_hw_interrupt
target/ppc: prepare to split interrupt mask
The macro is missing a '{' after the if condition. Any use of REQUIRE_HV
would cause a compilation error.
Fixes: fc34e81acd51 ("target/ppc: add macros to check privilege level")
Signed-off-by: Matheus Ferst
---
target/ppc/translate.c | 12 ++--
1 file changed
Signed-off-by: Matheus Ferst
---
target/ppc/insn32.decode | 1 +
target/ppc/translate.c | 14 --
target/ppc/translate/processor-ctrl-impl.c.inc | 9 +
3 files changed, 10 insertions(+), 14 deletions(-)
diff --git a/target/ppc
Signed-off-by: Matheus Ferst
---
target/ppc/insn32.decode | 2 ++
target/ppc/translate.c| 26 ---
.../ppc/translate/processor-ctrl-impl.c.inc | 24 +
3 files changed, 26 insertions(+), 26 deletions(-)
diff --git a
This instruction was added by Power ISA 3.0, using PPC2_PRCNTL makes it
available for older processors, like de e5500 and e6500.
Fixes: 7af1e7b02264 ("target/ppc: add support for hypervisor doorbells on
book3s CPUs")
Signed-off-by: Matheus Ferst
---
target/ppc/translate.c | 2
Signed-off-by: Matheus Ferst
---
target/ppc/insn32.decode | 5 ++
target/ppc/translate.c| 34 +
.../ppc/translate/processor-ctrl-impl.c.inc | 70 +++
3 files changed, 77 insertions(+), 32 deletions(-)
create mode 100644
On Power ISA v2.07, the category for these instructions became
"Embedded.Processor Control" or "Book S".
Signed-off-by: Matheus Ferst
---
target/ppc/translate.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/ppc/translate.c b/target/p
r these three
instructions. We then take this opportunity to move processor control
instruction to decodetree, fixing an embarrassing error in the
definition of the REQUIRE_HV macro along the way.
[1] https://lists.gnu.org/archive/html/qemu-ppc/2022-09/msg00586.html
Matheus Ferst (6):
target/ppc: fi
Move the methods to excp_helper.c and make them static.
Signed-off-by: Matheus Ferst
---
target/ppc/cpu_init.c| 102 ---
target/ppc/excp_helper.c | 102 +++
target/ppc/internal.h| 6 ---
3 files changed, 102
The method checks if any pending interrupt is unmasked and calls
cpu_interrupt/cpu_reset_interrupt accordingly. Code that raises/lowers
or masks/unmasks interrupts should call this method to keep
CPU_INTERRUPT_HARD coherent with env->pending_interrupts.
Signed-off-by: Matheus Ferst
---
Writes to LPCR are hypervisor privileged.
Signed-off-by: Matheus Ferst
---
The method introduced in the next patch, ppc_maybe_interrupt, will be
called in ppc_store_lpcr and only available in !CONFIG_USER_ONLY builds.
---
target/ppc/cpu.c | 2 ++
target/ppc/cpu.h | 2 +-
2 files changed, 3
The new method is identical to ppc_next_unmasked_interrupt_generic,
processor-specific code will be added/removed in the following patches.
No functional change intended.
Signed-off-by: Matheus Ferst
---
v2:
- Renamed the method from ppc_pending_interrupt_p7 to
p7_next_unmasked_interrupt
Export p7_interrupt_powersave and use it in p7_next_unmasked_interrupt.
Signed-off-by: Matheus Ferst
---
target/ppc/cpu_init.c| 2 +-
target/ppc/excp_helper.c | 24
target/ppc/internal.h| 1 +
3 files changed, 14 insertions(+), 13 deletions(-)
diff --git a
Export p8_interrupt_powersave and use it in p8_next_unmasked_interrupt.
Signed-off-by: Matheus Ferst
---
target/ppc/cpu_init.c| 2 +-
target/ppc/excp_helper.c | 24
target/ppc/internal.h| 1 +
3 files changed, 14 insertions(+), 13 deletions(-)
diff --git a
Move the interrupt masking logic out of cpu_has_work_POWER7 in a new
method, p7_interrupt_powersave, that only returns an interrupt if it can
wake the processor from power-saving mode. No functional change
intended.
Signed-off-by: Matheus Ferst
---
target/ppc/cpu_init.c | 45
No functional change intended.
Signed-off-by: Matheus Ferst
---
target/ppc/excp_helper.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index de6972d002..ca594c3b9e 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
ned-off-by: Matheus Ferst
---
target/ppc/excp_helper.c | 48
1 file changed, 48 deletions(-)
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index 0405fc8eee..4cbf6b29fc 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@
nd POWER5p;
Signed-off-by: Matheus Ferst
---
target/ppc/excp_helper.c | 50
1 file changed, 50 deletions(-)
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index f32472fb43..de6972d002 100644
--- a/target/ppc/excp_helper.c
+++ b/
nd POWER5p;
Signed-off-by: Matheus Ferst
---
v2:
- Remove CDOORBELL and THERM interrupts (farosas);
- Also remove RESET, DOORBELL, and HDOORBELL interrupts;
- Assert for the removed interrupts.
---
target/ppc/excp_helper.c | 63 +---
1 file changed, 8 inserti
The new method is identical to ppc_next_unmasked_interrupt_generic,
processor-specific code will be added/removed in the following patches.
Signed-off-by: Matheus Ferst
---
v2:
- Renamed the method from ppc_pending_interrupt_p8 to
p8_next_unmasked_interrupt
- Processor-specific stuff
The new method is identical to ppc_deliver_interrupt, processor-specific
code will be added/removed in the following patches. No functional
change intended.
Signed-off-by: Matheus Ferst
---
target/ppc/excp_helper.c | 113 +++
1 file changed, 113 insertions
The new method is identical to ppc_deliver_interrupt, processor-specific
code will be added/removed in the following patches. No functional
change intended.
Signed-off-by: Matheus Ferst
---
target/ppc/excp_helper.c | 113 +++
1 file changed, 113 insertions
Export p9_interrupt_powersave and use it in p9_next_unmasked_interrupt.
Signed-off-by: Matheus Ferst
---
Temporarily putting the prototype in internal.h for lack of a better place,
we will un-export p9_interrupt_powersave in future patches.
---
target/ppc/cpu_init.c| 2 +-
target/ppc
No functional change intended.
Signed-off-by: Matheus Ferst
---
target/ppc/excp_helper.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index 4cbf6b29fc..2e8d4699a9 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
The new method is identical to ppc_deliver_interrupt, processor-specific
code will be added/removed in the following patches. No functional
change intended.
Signed-off-by: Matheus Ferst
---
target/ppc/excp_helper.c | 118 +++
1 file changed, 118 insertions
No functional change intended.
Signed-off-by: Matheus Ferst
---
target/ppc/excp_helper.c | 9 +
1 file changed, 1 insertion(+), 8 deletions(-)
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index 603c956588..67e73f30ab 100644
--- a/target/ppc/excp_helper.c
+++ b
Move the interrupt masking logic out of cpu_has_work_POWER8 in a new
method, p8_interrupt_powersave, that only returns an interrupt if it can
wake the processor from power-saving mode. No functional change
intended.
Signed-off-by: Matheus Ferst
---
target/ppc/cpu_init.c | 61
Interval Timer: only defined
for embedded CPUs;
- Hypervisor Doorbell, Doorbell, and Critical Doorbell: processor does
not implement the "Embedded.Processor Control" category;
- Programmable Interval Timer: 40x-only;
- PPC_INTERRUPT_THERM: only raised for 970 and POWER5p;
Signed-off-b
;
- Critical Doorbell Interrupt: removed in Power ISA v3.0;
- Programmable Interval Timer: 40x-only.
Signed-off-by: Matheus Ferst
---
target/ppc/excp_helper.c | 33 -
1 file changed, 33 deletions(-)
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index
Now that cs->interrupt_request indicates if there is any unmasked
interrupt, checking if the CPU has work to do can be simplified to a
single check that works for all CPU models.
Signed-off-by: Matheus Ferst
---
target/ppc/cpu_init.c | 94 +--
1 f
;
- Critical Doorbell Interrupt: removed in Power ISA v3.0;
- Programmable Interval Timer: 40x-only.
Signed-off-by: Matheus Ferst
---
v2:
- Remove CDOORBELL and THERM (farosas);
- Also remove RESET and DEBUG, interrupts;
- Assert for the removed interrupts.
---
target/ppc/excp_helper.c | 42
Move the interrupt masking logic out of cpu_has_work_POWER9 in a new
method, p9_interrupt_powersave, that only returns an interrupt if it can
wake the processor from power-saving mode. No functional change
intended.
Signed-off-by: Matheus Ferst
---
target/ppc/cpu_init.c | 126
Split ppc_hw_interrupt into an interrupt masking method,
ppc_next_unmasked_interrupt, and an interrupt processing method,
ppc_deliver_interrupt.
Signed-off-by: Matheus Ferst
---
v2:
- ppc_hw_interrupt renamed as ppc_deliver_interrupt (farosas);
- Handle the "Wakeup from PM stat
The new method is identical to ppc_next_unmasked_interrupt_generic,
processor-specific code will be added/removed in the following patches.
No functional change intended.
Signed-off-by: Matheus Ferst
---
v2:
- Renamed the method from ppc_pending_interrupt_p9 to
p9_next_unmasked_interrupt
No functional change intended.
Signed-off-by: Matheus Ferst
---
v2:
- Use "generic" instead of "legacy" to name the original methods (farosas).
---
target/ppc/excp_helper.c | 20 ++--
1 file changed, 18 insertions(+), 2 deletions(-)
diff --git a/target
Use ppc_set_irq to raise/clear interrupts to ensure CPU_INTERRUPT_HARD
will be set/reset accordingly.
Signed-off-by: Matheus Ferst
---
target/ppc/excp_helper.c | 17 +++--
target/ppc/misc_helper.c | 9 ++---
2 files changed, 9 insertions(+), 17 deletions(-)
diff --git a/target
[3] https://lists.gnu.org/archive/html/qemu-ppc/2022-06/msg00336.html
Matheus Ferst (29):
target/ppc: define PPC_INTERRUPT_* values directly
target/ppc: always use ppc_set_irq to set env->pending_interrupts
target/ppc: split interrupt masking and delivery from ppc_hw_interrupt
target/ppc: p
viewed-by: David Gibson
Signed-off-by: Matheus Ferst
---
hw/ppc/ppc.c | 10 +++---
hw/ppc/trace-events | 2 +-
target/ppc/cpu.h | 40 +++---
target/ppc/cpu_init.c| 56 +++---
target/ppc/excp_help
Writes to LPCR are hypervisor privileged.
Signed-off-by: Matheus Ferst
---
target/ppc/cpu.c | 2 ++
target/ppc/cpu.h | 2 +-
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/target/ppc/cpu.c b/target/ppc/cpu.c
index 401b6f9e63..9f261bde8e 100644
--- a/target/ppc/cpu.c
+++ b/target
Now that cs->interrupt_request indicates if there is any unmasked
interrupt, checking if the CPU has work to do can be simplified to a
single check that works for all CPU models.
Signed-off-by: Matheus Ferst
---
target/ppc/cpu_init.c | 212 +-
1 f
This new method will check if any pending interrupt was unmasked and
then call cpu_interrupt/cpu_reset_interrupt accordingly. Code that
raises/lowers or masks/unmasks interrupts should call this method to
keep CPU_INTERRUPT_HARD coherent with env->pending_interrupts.
Signed-off-by: Matheus Fe
The new method is based on cpu_has_work_POWER7 and
ppc_pending_interrupt_legacy.
Signed-off-by: Matheus Ferst
---
target/ppc/excp_helper.c | 130 +++
1 file changed, 130 insertions(+)
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index
Create an interrupt masking method for POWER8. The new method is based
on cpu_has_work_POWER8 and ppc_pending_interrupt_legacy.
Signed-off-by: Matheus Ferst
---
target/ppc/excp_helper.c | 138 +++
1 file changed, 138 insertions(+)
diff --git a/target/ppc
The Hypervisor Virtualization Interrupt was introduced in PowerISA v3.0.
Critical Input, Watchdog Timer, and Fixed Interval Timer are only
defined for embedded CPUs. The Programmable Interval Timer is 40x-only.
Signed-off-by: Matheus Ferst
---
target/ppc/excp_helper.c | 27
The Hypervisor Virtualization Interrupt was introduced in PowerISA v3.0.
Critical Input, Watchdog Timer, and Fixed Interval Timer are only
defined for embedded CPUs. The Programmable Interval Timer is 40x-only.
The Event-Based Branch Facility was added in PowerISA v2.07.
Signed-off-by: Matheus
Rename the method to ppc_interrupt_pending_legacy and create a new
ppc_interrupt_pending that will call the appropriate interrupt masking
method based on env->excp_model.
Signed-off-by: Matheus Ferst
---
target/ppc/excp_helper.c | 10 +-
1 file changed, 9 insertions(+), 1 delet
Create an interrupt masking method for the POWER9 and POWER10
processors. The new method is based on cpu_has_work_POWER{9,10} and
ppc_pending_interrupt_legacy.
Signed-off-by: Matheus Ferst
---
target/ppc/excp_helper.c | 160 +++
1 file changed, 160 insertions
Critical Input, Watchdog Timer, and Fixed Interval Timer are only
defined for embedded CPUs. The Programmable Interval Timer is 40x-only.
Signed-off-by: Matheus Ferst
---
target/ppc/excp_helper.c | 18 --
1 file changed, 18 deletions(-)
diff --git a/target/ppc/excp_helper.c b
ed-off-by: Matheus Ferst
---
hw/ppc/ppc.c | 10 +++---
hw/ppc/trace-events | 2 +-
target/ppc/cpu.h | 40 +++---
target/ppc/cpu_init.c| 56 +++---
target/ppc/excp_helper.c | 74
t
Use ppc_set_irq to raise/clear interrupts to ensure CPU_INTERRUPT_HARD
will be set/reset accordingly.
Signed-off-by: Matheus Ferst
---
target/ppc/excp_helper.c | 17 +++--
target/ppc/misc_helper.c | 9 ++---
2 files changed, 9 insertions(+), 17 deletions(-)
diff --git a/target
Move the interrupt masking logic to a new method, ppc_pending_interrupt,
and only handle the interrupt processing in ppc_hw_interrupt.
Signed-off-by: Matheus Ferst
---
target/ppc/excp_helper.c | 228 ---
1 file changed, 141 insertions(+), 87 deletions
wer skiboot with "-smp 4"
goes from 1m09s to 20.79s.
[1] https://lists.gnu.org/archive/html/qemu-ppc/2022-06/msg00336.html
[2] https://lists.gnu.org/archive/html/qemu-ppc/2022-06/msg00372.html
[3] https://github.com/legoater/qemu-ppc-boot
Matheus Ferst (13):
target/ppc: define PPC_INT
u/-/issues/85
Signed-off-by: Matheus Ferst
---
v3:
- Only check env->tb_env in softmmu, linux-user get timebase from
elsewhere. Also, try to make the qemu_fprintf call more readable.
- Link to v2:
https://lists.gnu.org/archive/html/qemu-ppc/2022-07/msg00193.html
---
target/ppc
u/-/issues/85
Signed-off-by: Matheus Ferst
---
v2:
- Added checks in monitor_get_decr, monitor_get_tbu, and monitor_get_tbl.
- Link to v1: https://lists.gnu.org/archive/html/qemu-ppc/2022-07/msg00173.html
---
target/ppc/cpu_init.c | 16
target/ppc/monitor.c | 9 +
2
u/-/issues/85
Signed-off-by: Matheus Ferst
---
This patch fixes the reported problem, but may be an incomplete solution
since many other places dereference env->tb_env without checking for
NULL. AFAICS, "-machine none" is the only way to trigger this problem,
and I'm not famil
The first patch of this series is the RFC of [1] (hence the r-b in v1).
Patches 2~4 follow the other problems that Laurent pointed out, and
patches 5-6 fix similar problems that I found.
[1] https://lists.gnu.org/archive/html/qemu-ppc/2022-01/msg00400.html
Matheus Ferst (6):
target/ppc: Fix
4 bits of the error code on
POWERPC_EXCP_INVAL exceptions.
Also, take the opportunity to replace printf with qemu_log_mask.
Signed-off-by: Matheus Ferst
---
target/ppc/translate.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/target/ppc/translate.c b/target/ppc/transla
The only PowerPC implementations with these insns were the 460 and 460F,
which had their definitions removed in [1].
[1] 7ff26aa6c657 ("target/ppc: Remove unused PPC 460 and 460F definitions")
Signed-off-by: Matheus Ferst
---
target/ppc/cpu.h | 6 ++
target/ppc/transl
code are
ignored by all powerpc_excp_* methods on POWERPC_EXCP_INVAL exceptions.
Reported-by: Laurent Vivier
Signed-off-by: Matheus Ferst
---
target/ppc/helper.h | 2 +-
target/ppc/timebase_helper.c | 6 +++---
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/target/ppc
softmmu targets as
gen_hvpriv_exception uses the same 'exception' argument
(POWERPC_EXCP_HV_EMU) for raise_exception_*, and the powerpc_excp_*
methods do not use lower bits of the exception error code when handling
POWERPC_EXCP_{INVAL,PRIV}.
Reported-by: Laurent Vivier
Signed-off-by: Mat
type
and IC value as the error code.
Fixes: 565cb1096733 ("target/ppc: add user read/write functions for MMCR0")
Signed-off-by: Matheus Ferst
---
target/ppc/power8-pmu-regs.c.inc | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/target/ppc/power8-pmu-regs
", as seen in [1].
[1] https://gitlab.com/qemu-project/qemu/-/issues/588
Fixes: 9b2fadda3e01 ("ppc: Rework generation of priv and inval interrupts")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/588
Reviewed-by: Fabiano Rosas
Signed-off-by: Matheus Ferst
---
This patch
And also move the insn to decodetree.
Signed-off-by: Matheus Ferst
---
target/ppc/helper.h | 2 +-
target/ppc/insn32.decode| 1 +
target/ppc/int_helper.c | 12 ++--
target/ppc/translate/vmx-impl.c.inc | 2 +-
target/ppc/translate/vmx-ops.c.inc
And also move the insns to decodetree and remove the now unused
avr_qw_addc method.
Signed-off-by: Matheus Ferst
---
target/ppc/helper.h | 4 +--
target/ppc/insn32.decode| 3 ++
target/ppc/int_helper.c | 53 +
target/ppc
And also move the insn to decodetree.
Signed-off-by: Matheus Ferst
---
target/ppc/helper.h | 2 +-
target/ppc/insn32.decode| 2 ++
target/ppc/int_helper.c | 8 ++--
target/ppc/translate/vmx-impl.c.inc | 3 ++-
target/ppc/translate/vmx-ops.c.inc | 1
And also move the insn to decodetree and remove the now unused
avr_qw_not, avr_qw_cmpu, and avr_qw_add methods.
Signed-off-by: Matheus Ferst
---
target/ppc/helper.h | 2 +-
target/ppc/insn32.decode| 1 +
target/ppc/int_helper.c | 51
Also drop VECTOR_FOR_INORDER_I usage since there is no need to access
the elements in any particular order, and move the instruction to
decodetree.
Signed-off-by: Matheus Ferst
---
target/ppc/helper.h | 2 +-
target/ppc/insn32.decode| 4 +++
target/ppc/int_helper.c
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