On 2024/5/10 14:58, Fea.Wang wrote:
Based on privilege 1.13 spec, there should be a bit56 for 'P1P13' in
SMSTATEEN0 that controls access to the hedeleg.
Signed-off-by: Fea.Wang
Reviewed-by: Frank Chang
---
target/riscv/cpu_bits.h | 1 +
target/riscv/csr.c | 10 ++
2 files c
On 2024/5/10 14:58, Fea.Wang wrote:
Add RISC-V privilege 1.13 support.
Signed-off-by: Fea.Wang
Reviewed-by: Frank Chang
---
target/riscv/cpu.c | 6 +-
target/riscv/cpu.h | 4 +++-
target/riscv/cpu_cfg.h | 1 +
target/riscv/tcg/tcg-cpu.c | 4
4 files changed
On 2024/5/11 18:10, Alexey Baturo wrote:
From: Alexey Baturo
Signed-off-by: Alexey Baturo
Reviewed-by: Alistair Francis
---
target/riscv/cpu.h | 8
target/riscv/cpu_bits.h | 3 +++
target/riscv/cpu_cfg.h | 3 +++
target/riscv/csr.c | 11 +++
target/risc
On 2024/5/11 18:10, Alexey Baturo wrote:
From: Alexey Baturo
Hi,
It looks like Pointer Masking spec has reached v1.0 and been frozen,
rebasing on riscv-to-apply.next branch and resubmitting patches.
Hi, any change from v0.8 to v1.0?
Regards,
Weiwei Li
Thanks.
[v8]:
Rebasing patches o
On 2024/5/11 19:26, Yangyu Chen wrote:
This code has a typo that writes zvkb to zvkg, causing users can't
enable zvkb through the config. This patch gets this fixed.
Signed-off-by: Yangyu Chen
Fixes: ea61ef7097d0 ("target/riscv: Move vector crypto extensions to
riscv_cpu_extensions")
Reviewe
On 2024/5/10 14:58, Fea.Wang wrote:
From: Jim Shu
Public the conversion function of priv_spec and string in cpu.h, so that
tcg-cpu.c could also use it.
Signed-off-by: Jim Shu
Signed-off-by: Fea.Wang
Reviewed-by: Frank Chang
---
target/riscv/cpu.c | 4 ++--
target/riscv/cpu.h
