From: Juha Riihimäki
Signed-off-by: Juha Riihimäki
---
hw/onenand.c |5 +
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/hw/onenand.c b/hw/onenand.c
index 6f68f70..7898da9 100644
--- a/hw/onenand.c
+++ b/hw/onenand.c
@@ -26,6 +26,7 @@
#include "memory.h"
#include "exec
From: Juha Riihimäki
also gracefully fail on nand_device_init() for unsupported block
size instead of aborting.
Signed-off-by: Juha Riihimäki
---
hw/nand.c | 20 +---
1 files changed, 13 insertions(+), 7 deletions(-)
diff --git a/hw/nand.c b/hw/nand.c
index c27783e..fad00d1
From: Juha Riihimäki
Make NAND and OneNAND device models reject read-only drives.
Test for example by running
$ qemu-system-arm -drive if=none,file=/dev/zero,readonly,id=foo -device
nand,drive=foo,chip_id=0x59 -kernel /dev/null
or
$ qemu-system-arm -drive if=none,file=/dev/zero,readonly,id=fo
From: Juha Riihimäki
Signed-off-by: Juha Riihimäki
---
hw/onenand.c |5 +
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/hw/onenand.c b/hw/onenand.c
index 6f68f70..7898da9 100644
--- a/hw/onenand.c
+++ b/hw/onenand.c
@@ -26,6 +26,7 @@
#include "memory.h"
#include "exec
From: Juha Riihimäki
Make NAND and OneNAND device models reject read-only drives.
Test for example by running
$ qemu-system-arm -drive if=none,file=/dev/zero,readonly,id=foo -device
nand,drive=foo,chip_id=0x59 -kernel /dev/null
or
$ qemu-system-arm -drive if=none,file=/dev/zero,readonly,id=fo
From: Juha Riihimäki
Signed-off-by: Juha Riihimäki
---
hw/nand.c | 23 +++
1 files changed, 15 insertions(+), 8 deletions(-)
diff --git a/hw/nand.c b/hw/nand.c
index c27783e..da6529d 100644
--- a/hw/nand.c
+++ b/hw/nand.c
@@ -19,6 +19,7 @@
# include "flash.h"
# include
From: Juha Riihimäki
A data structure of type sockaddr_in is allocated from stack but not
properly initialized. This may lead to a failure in the bind() call
later on. Fixed by filling the contents of the structure with zeroes
before using it.
Signed-off-by: Juha Riihimäki
---
slirp/socket.c |
From: Juha Riihimäki
Revised version of the ARM NEON instruction decoding fix patch. The
patch has now been split in two, first patch introduces the functional
changes and the second patch aligns the source code formatting inside
the disas_neon_data_insn() function.
The functional patch has also
From: Juha Riihimäki
This patch improves the detection of undefined NEON data instruction
encodings, fixes bugs in some of the instruction decodings and adds an
implementation for 64bit wide vsli and vsri instructions.
Signed-off-by: Juha Riihimäki
---
target-arm/translate.c | 450 +++
From: Juha Riihimäki
source code alignment through the disas_neon_data_insn() function is
inconsistent; this patch aligns the formatting.
Signed-off-by: Juha Riihimäki
---
target-arm/translate.c | 697 +++-
1 files changed, 390 insertions(+), 307 de
From: Juha Riihimäki
ARM load/store multiple instructions can be slightly optimized by
loading the register offset constant into a variable outside the
register loop and using the preloaded variable inside the loop instead
of reloading the offset value to a temporary variable on each loop
iterati
From: Juha Riihimäki
tmp4 and tmp5 temporary variables are allocated using tcg_const_i32
but incorrectly released using dead_tmp which will cause resource
leak tracking to report false leaks.
Signed-off-by: Juha Riihimäki
---
target-arm/translate.c |4 ++--
1 files changed, 2 insertions(+)
From: Juha Riihimäki
All other bits except for the EN in the VFP FPEXC register are defined
as subarchitecture specific and real functionality for any of the
other bits has not been implemented in QEMU. However, current code
allows modifying all bits in the VFP FPEXC register leading to
problems
From: Juha Riihimäki
Current code is broken at least on recent compilers, comparison
between signed and unsigned types yield incorrect code and render
the neon shift helper functions defunct. This is the third revision
of this patch, casting all comparisons with the sizeof operator to
signed ssiz
From: Juha Riihimäki
Thumb push/pop instructions can be slightly optimized by loading the
register offset constant into a variable outside the register loop and
using the preloaded variable inside the loop instead of reloading the
offset value to a temporary variable on each loop iteration. This
From: Juha Riihimäki
VFP load/store multiple instructions can be slightly optimized by
loading the register offset constant into a variable outside the
register loop and using the preloaded variable inside the loop instead
of reloading the offset value to a temporary variable on each loop
iterati
From: Juha Riihimäki
Current code is broken at least on gcc 4.2, the result of a comparison
"-1 >= sizeof(type) * 8" results true and causes wrong code path to
be taken. The fix has been revised to use a type cast instead of
abs() function and extra checks.
Signed-off-by: Juha Riihimäki
---
ta
From: Juha Riihimäki
Reduce the amount of TCG ops generated from NEON vld/vst instructions
by simplifying the code generation.
Signed-off-by: Juha Riihimäki
---
target-arm/translate.c | 67 ---
1 files changed, 34 insertions(+), 33 deletions(-)
di
From: Juha Riihimäki
Shift by immediate value is incorrectly overwritten by a temporary
variable in the processing of NEON vsri, vshl and vsli instructions.
This patch has been revised to also include a fix for the special
case where the code would previously try to shift an integer value
over 31
From: Juha Riihimäki
Thumb2 load/store multiple instructions can be slightly optimized by
loading the register offset constant into a variable outside the
register loop and using the preloaded variable inside the loop instead
of reloading the offset value to a temporary variable on each loop
iter
From: Juha Riihimäki
RM load/store multiple instructions can be slightly optimized by
loading the register offset constant into a variable outside the
register loop and using the preloaded variable inside the loop instead
of reloading the offset value to a temporary variable on each loop
iteratio
From: Juha Riihimäki
Add support for NEON vld1.64 and vst1.64 instructions. This patch is
revised to follow more closely the specification and raises
undefined exception if 64bit element size is used for vld2/vst2 or
vld4/vst4 instructions.
Signed-off-by: Juha Riihimäki
---
target-arm/translat
From: Juha Riihimäki
All other bits except for the EN in the VFP FPEXC register are defined
as subarchitecture specific and real functionality for any of the
other bits has not been implemented in QEMU. However, current code
allows modifying all bits in the VFP FPEXC register leading to
problems
From: Juha Riihimäki
This is the revised set of patches for the ARM translator and it includes a
number of smaller fixes and improvements. The series should be applied in
sequence as the modifications are mostly related to the same file,
target-arm/translate.c. The whole series should apply cl
From: Juha Riihimäki
In the existing code shift value is clobbered during the pass loop.
This patch changes the code so that it stores the intermediate
result in the target neon register directly and eliminates the need
to use a temporary to hold the intermediate value thus leaving the
shift valu
From: Juha Riihimäki
Revised patch for getting rid of tcg temporary variable leaks in
target-arm/translate.c. This version also includes the leak patch for
gen_set_cpsr macro, now converted as a static inline function, which I
sent earlier as a separate patch on top of this patch.
Signed-off-by:
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