在 2025/7/14 下午5:29, Bibo Mao 写道:
On 2025/7/11 下午4:59, Song Gao wrote:
Implement avec set irq and update CSR_MSIS.
Signed-off-by: Song Gao
---
hw/intc/loongarch_avec.c | 34 --
1 file changed, 32 insertions(+), 2 deletions(-)
diff --git a/hw/intc/loongarch_
在 2025/7/15 上午9:02, Bibo Mao 写道:
On 2025/7/11 下午4:59, Song Gao wrote:
Avecintc feature is added in LoongArchVirtMachinState, and it is used
to check whether virt machine supports the advanced interrupt controller
and by default set avecintc with ON_OFF_AUTO_ON.
LoongArchVirtMachineState adds m
在 2025/7/14 上午9:54, Bibo Mao 写道:
On LoongArch64 system, the high 32 bit of 64 bit virtual address should be
0x0[0-7]yyy or 0x8yyy. The bit from 47 to 63 should be all 0 or
all 1.
Function get_physical_address() only checks bit 48 to 63, there will be
problem with the following test case.
在 2025/7/10 上午9:54, Bibo Mao 写道:
@@ -1238,6 +1262,12 @@ static void virt_class_init(ObjectClass *oc,
const void *data)
NULL, NULL);
object_class_property_set_description(oc, "v-eiointc",
"Enable Virt Extend I/O Interrupt
Controller.");
+#ifdef CONF
在 2025/7/10 上午10:43, Bibo Mao 写道:
On 2025/7/3 下午5:26, Song Gao wrote:
when loongarch cpu set irq is INT_AVEC, we need set CSR_ESTAT.MSGINT bit
and CSR_ECFG.MSGINT bit.
Signed-off-by: Song Gao
---
target/loongarch/cpu-csr.h | 6 --
target/loongarch/cpu.c | 10 ++
2 files
在 2025/6/18 下午2:26, Bibo Mao 写道:
Page size of TLB entry comes from CSR STLBPS and pwcl register. With
huge page, it is dir_base + dir_width from pwcl register. With normal
page, it is field of PTBASE from pwcl register.
So it is ok to check validity in function helper_ldpte() and function
helper
在 2025/6/18 下午2:26, Bibo Mao 写道:
Function helper_csrwr_stlbps() is emulation with CSR STLBPS register
write operation. However there is only parameter checking action, and
no register updating action. Here update value of CSR_STLBPS when
parameter passes to check.
Signed-off-by: Bibo Mao
---
在 2025/6/18 下午2:26, Bibo Mao 写道:
There is small typo issue in function helper_csrwr_pwcl(), this patch
corrects this issue.
Signed-off-by: Bibo Mao
---
target/loongarch/tcg/csr_helper.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
Reviewed-by: Song Gao
Thanks.
Song Gao
diff
在 2025/7/2 下午5:59, Bibo Mao 写道:
On 2025/7/2 下午3:21, gaosong wrote:
在 2025/7/2 上午11:15, Bibo Mao 写道:
On 2025/6/27 上午11:01, Song Gao wrote:
Implement avec set irq and update CSR_MSIS and CSR_MSGIR.
Signed-off-by: Song Gao
---
hw/intc/loongarch_avec.c | 44
在 2025/7/2 下午5:46, Bibo Mao 写道:
On 2025/7/2 下午3:10, gaosong wrote:
在 2025/7/2 上午10:03, Bibo Mao 写道:
On 2025/6/27 上午11:01, Song Gao wrote:
LoongArchVirtMachinState adds avecintc features, and
it use to check whether virt machine support advance interrupt
controller
and default set
在 2025/7/2 上午11:20, Bibo Mao 写道:
On 2025/6/27 上午11:01, Song Gao wrote:
when loongarch cpu set irq is INT_AVEC, we need set CSR_ESTAT.MSGINT bit
and CSR_ECFG.MSGINT bit.
Signed-off-by: Song Gao
---
target/loongarch/cpu-csr.h | 6 --
target/loongarch/cpu.c | 10 ++
2 files
在 2025/7/2 上午11:15, Bibo Mao 写道:
On 2025/6/27 上午11:01, Song Gao wrote:
Implement avec set irq and update CSR_MSIS and CSR_MSGIR.
Signed-off-by: Song Gao
---
hw/intc/loongarch_avec.c | 44 ++--
1 file changed, 42 insertions(+), 2 deletions(-)
diff --git
在 2025/7/2 上午9:42, Bibo Mao 写道:
On 2025/6/27 上午11:01, Song Gao wrote:
move som machine define to virt.h and define avec feature and status
bit.
Use the IOCSRF_AVEC bit for avdance interrupt controller drivers
avecintc_enable[1] and set the default value of the MISC_FUNC_REG bit
IOCSRM_AVEC_E
在 2025/7/2 上午10:24, Bibo Mao 写道:
On 2025/6/27 上午11:01, Song Gao wrote:
include CSR_MSGIS0-3, CSR_MSGIR and CSR_MSGIE.
Signed-off-by: Song Gao
---
target/loongarch/cpu-csr.h | 3 +++
target/loongarch/cpu.c | 7 +++
target/loongarch/cpu.h | 10 ++
target/loongarch/ma
在 2025/7/2 上午10:03, Bibo Mao 写道:
On 2025/6/27 上午11:01, Song Gao wrote:
LoongArchVirtMachinState adds avecintc features, and
it use to check whether virt machine support advance interrupt
controller
and default set avecintc = ON_OFF_AUTO_ON.
LoongArchVirtMachineState adds misc_feature and mis
在 2025/6/20 下午3:05, Bibo Mao 写道:
--- a/target/loongarch/machine.c
+++ b/target/loongarch/machine.c
@@ -231,6 +231,11 @@ const VMStateDescription vmstate_loongarch_cpu = {
VMSTATE_UINT64(env.CSR_DERA, LoongArchCPU),
VMSTATE_UINT64(env.CSR_DSAVE, LoongArchCPU),
+ /* Msg
在 2025/6/21 上午2:12, Stefan Hajnoczi 写道:
On Thu, Jun 19, 2025 at 11:11 PM gaosong wrote:
在 2025/6/20 上午4:39, Stefan Hajnoczi 写道:
gpg:using RSA key CA473C44D6A09C189A193FCD452B96852B268216
gpg: Can't check signature: No public key
Why has the GPG key changed? Your previous
-list-signatures
/home/gaosong/.gnupg/pubring.kbx
pub rsa1024 2022-09-16 [SC]
B8FF1DA0D2FDCB2DA09C6C2C40A2FFF239263EDF
uid [ 未知 ] Song Gao
sig 340A2FFF239263EDF 2022-09-16 Song Gao
sig 452B96852B268216 2025-06-20 Song Gao
在 2025/6/20 上午4:39, Stefan Hajnoczi 写道:
On Thu, Jun 19, 2025 at 4:51 AM Song Gao wrote:
The following changes since commit 6e1571533fd92bec67e5ab9b1dd1e15032925757:
Merge tag 'tracing-pull-request' of https://gitlab.com/stefanha/qemu into
staging (2025-06-16 13:47:19 -0400)
are available
Ping ! :-)
在 2025/6/5 上午9:53, Song Gao 写道:
on qemu we got an aborted error
**
ERROR:../target/loongarch/tcg/insn_trans/trans_vec.c.inc:3574:vldi_get_value:
code should not be reached
Bail out!
ERROR:../target/loongarch/tcg/insn_trans/trans_vec.c.inc:3574:vldi_get_value:
code should not be reac
在 2025/6/17 下午3:34, Bibo Mao 写道:
hi,
here is pch_msi [start-256] gpio_out connect to avec gpio_in
[start, 256], not the avec connect to cpu.
pch_msi is always connected to eiointc, and it is not connected to
avec gpio_in. There is two MSI controllers coexisting together:
pch_msi and avec,
在 2025/6/6 下午2:30, Bibo Mao 写道:
If kernel irqchip is set such as kvm_irqchip_in_kernel() return true, there
is special operations with irqchips in such fields:
1. During irqchip object realization, kvm_create_device() is used here
to create irqchip in KVM kernel.
2. Add pre_save and p
在 2025/6/11 下午2:36, Bibo Mao 写道:
On 2025/6/9 下午6:48, Song Gao wrote:
Signed-off-by: Song Gao
---
hw/loongarch/virt.c | 18 +-
1 file changed, 13 insertions(+), 5 deletions(-)
diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index 718b5b4f92..6b670e7936 100644
--- a/h
在 2025/6/11 下午2:26, Bibo Mao 写道:
On 2025/6/9 下午6:48, Song Gao wrote:
Signed-off-by: Song Gao
---
hw/intc/loongarch_avec.c | 37 ++---
1 file changed, 34 insertions(+), 3 deletions(-)
diff --git a/hw/intc/loongarch_avec.c b/hw/intc/loongarch_avec.c
index c69
在 2025/6/11 下午2:40, Bibo Mao 写道:
On 2025/6/9 下午6:48, Song Gao wrote:
the AVEC controller supports 256*256 irqs, all the irqs connect CPU
INT_AVEC irq
Signed-off-by: Song Gao
---
hw/intc/loongarch_avec.c | 28
hw/loongarch/virt.c | 11 +--
target
在 2025/6/11 下午2:46, Bibo Mao 写道:
On 2025/6/9 下午6:48, Song Gao wrote:
LoongArchVirtMachinState add avecintc features, and
it use to check whether virt machine support advance interrupt
controller
and default is on.
Signed-off-by: Song Gao
---
hw/loongarch/virt.c | 31
在 2025/6/5 下午5:28, Bibo Mao 写道:
Interrupt controller extioi supports 256 vectors, register EXTIOI_COREISR
records pending interrupt status with bitmap method. Size of EXTIOI_COREISR
is 256 / 8 = 0x20 bytes, EXTIOI_COREISR_END should be EXTIOI_COREISR_START
+ 0x20 rather than 0xB20.
Signed-off-by
在 2025/6/4 下午5:05, Alireza Sanaee 写道:
On Wed, 4 Jun 2025 14:55:00 +0800
Bibo Mao wrote:
On big endian host machine such as S390, bios-table-test fails to run.
And also linux kernel fails to boot.
This patches solves these two issues.
Bibo Mao (2):
hw/loongarch/virt: Fix big endian support
在 2025/6/4 下午7:23, Michael Tokarev 写道:
On 04.06.2025 11:40, Song Gao wrote:
+static bool check_vldi_mode(arg_vldi *a)
+{
+ return (a->imm >>8 & 0xf) <= 12;
+}
static bool gen_vldi(DisasContext *ctx, arg_vldi *a, uint32_t oprsz)
{
An empty line can be added here between two functions dur
在 2025/6/3 下午5:44, Michael Tokarev 写道:
03.06.2025 11:25, Song Gao wrote:
on qemu we got an aborted error
**
ERROR:../target/loongarch/tcg/insn_trans/trans_vec.c.inc:3574:vldi_get_value:
code should not be reached
Bail out!
ERROR:../target/loongarch/tcg/insn_trans/trans_vec.c.inc:3574:vldi_get_
在 2025/6/3 下午7:15, Philippe Mathieu-Daudé 写道:
On 3/6/25 10:25, Song Gao wrote:
on qemu we got an aborted error
**
ERROR:../target/loongarch/tcg/insn_trans/trans_vec.c.inc:3574:vldi_get_value:
code should not be reached
Bail out!
ERROR:../target/loongarch/tcg/insn_trans/trans_vec.c.inc:3574:vld
在 2025/6/3 下午5:59, Bibo Mao 写道:
Song,
It is a little strange that patch with three version is sent in one day.
Maybe we should keep careful and calm :-)
yes agreed,
I should be more careful and calm. :-)
thanks.
Song Gao
Regards
Bibo Mao
On 2025/6/3 下午4:25, Song Gao wrote:
on qemu we got
在 2025/6/3 下午3:42, Richard Henderson 写道:
On 6/3/25 03:48, Song Gao wrote:
on qemu we got an aborted error
**
ERROR:../target/loongarch/tcg/insn_trans/trans_vec.c.inc:3574:vldi_get_value:
code should not be reached
Bail out!
ERROR:../target/loongarch/tcg/insn_trans/trans_vec.c.inc:3574:vldi_get
在 2025/6/3 上午11:18, Qiang Ma 写道:
Commit bab27ea2e3 ("hw/arm/virt: smbios:
inform guest of kvm") fixes the same issue
on arm.
without this patch:
[root@localhost ~]# virt-what
qemu
with this patch:
[root@localhost ~]# virt-what
kvm
Signed-off-by: Qiang Ma
---
hw/loongarch/virt.c | 4
1
Ping!
在 2025/5/22 下午2:55, Song Gao 写道:
on qemu we got an aborted error
**
ERROR:../target/loongarch/tcg/insn_trans/trans_vec.c.inc:3574:vldi_get_value:
code should not be reached
Bail out!
ERROR:../target/loongarch/tcg/insn_trans/trans_vec.c.inc:3574:vldi_get_value:
code should not be reached
PIng !
在 2025/5/23 上午9:17, Song Gao 写道:
fcond only has 22 types, add a check for fcond.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2972
Signed-off-by: Song Gao
---
target/loongarch/tcg/insn_trans/trans_fcmp.c.inc | 11 ---
target/loongarch/tcg/insn_trans/trans_vec.c.inc
在 2025/5/23 下午5:51, Bibo Mao 写道:
Memory about LoongArchExtIOICommonState::cpu is allocated in common
code, it had better be freed in common code also.
Signed-off-by: Bibo Mao
---
hw/intc/loongarch_extioi.c| 9 -
hw/intc/loongarch_extioi_common.c | 9 +
在 2025/5/5 上午4:57, Richard Henderson 写道:
Check va32 state.
Cc: Song Gao
Cc: Bibo Mao
Signed-off-by: Richard Henderson
---
target/loongarch/cpu.c | 7 +++
1 file changed, 7 insertions(+)
Reviewed-by: Song Gao
Thanks.
Song Gao
在 2025/4/30 下午5:47, Bibo Mao 写道:
Global variables memmap_table and memmap_entries stores UEFI memory
map table informations. It can be moved into structure
LoongArchVirtMachineState.
Signed-off-by: Bibo Mao
---
hw/loongarch/boot.c | 31 +++
hw/loongarch/vi
在 2025/5/22 上午10:08, Lorenz Hetterich 写道:
---
target/loongarch/tcg/insn_trans/trans_vec.c.inc | 13 +
1 file changed, 13 insertions(+)
diff --git a/target/loongarch/tcg/insn_trans/trans_vec.c.inc
b/target/loongarch/tcg/insn_trans/trans_vec.c.inc
index dff92772ad..5589a9e865 10064
在 2025/5/7 上午10:31, Bibo Mao 写道:
This series patchset is to clean up with memory regions of loongarch pch
pic interrupt controller. Originally there are three iomem regions:
iomem32_low, iomem8, iomem32_highm. Since these regions only support
4 bytes/1 byte/4 bytes access, it is divided into thre
在 2025/4/30 上午11:04, Bibo Mao 写道:
With load_elf() api, image load low address and high address is converted
to physical address if parameter translate_fn is provided. However
executing entry address is still virtual address. Here convert entry
address into physical address, since MMU is disabled
在 2025/3/4 下午3:41, Bibo Mao 写道:
On LoongArch virt machine, the default OEM ID and OEM table ID is
"BOCHS " and "BXPC". Here property x-oem-id and x-oem-table-id
is added on virt machine to set customized OEM ID and OEM table ID.
Signed-off-by: Bibo Mao
---
hw/loongarch/virt.c | 58 +++
在 2025/3/4 下午3:41, Bibo Mao 写道:
XSDT table is introduced in ACPI Specification 5.0, it supports 64-bit
address in the table. There is LoongArch system support from ACPI
Specification 6.4 and later, XSDT is supported by LoongArch system.
Here replace RSDT with XSDT table.
Signed-off-by: Bibo Mao
在 2025/3/24 下午5:37, Bibo Mao 写道:
Rename memory region iomem32_low with iomem, also change ops name
as follows:
loongarch_pch_pic_reg32_low_ops --> loongarch_pch_pic_ops
loongarch_pch_pic_low_readw --> loongarch_pch_pic_read
loongarch_pch_pic_low_writew --> loongarch_pch_pic_wri
在 2025/3/24 下午5:37, Bibo Mao 写道:
Add trace event trace_loongarch_pch_pic_read(), replaces the following
three events:
trace_loongarch_pch_pic_low_readw()
trace_loongarch_pch_pic_high_readw()
trace_loongarch_pch_pic_readb()
The similiar with write trace event.
Signed-off-by: Bibo Mao
--
在 2025/3/24 下午5:37, Bibo Mao 写道:
Add iomem8 region register write operation emulation in generic write
function loongarch_pch_pic_write(), and use this function for iomem8
region.
Signed-off-by: Bibo Mao
---
hw/intc/loongarch_pch_pic.c | 31 ++-
1 file changed, 10
在 2025/3/24 下午5:37, Bibo Mao 写道:
Add iomem32_high region register write operation emulation in generic
write function loongarch_pch_pic_write(), and use this function for
iomem32_high region.
Signed-off-by: Bibo Mao
---
hw/intc/loongarch_pch_pic.c | 28 +---
1 file ch
在 2025/3/24 下午5:37, Bibo Mao 写道:
For memory region iomem32_low, generic write callback is used.
Signed-off-by: Bibo Mao
---
hw/intc/loongarch_pch_pic.c | 140 +++-
1 file changed, 73 insertions(+), 67 deletions(-)
Reviewed-by: Song Gao
Thanks.
Song Gao
dif
在 2025/3/24 下午5:37, Bibo Mao 写道:
Add iomem8 region register read operation emulation in generic read
function loongarch_pch_pic_read(), and use this function for iomem8
region.
Signed-off-by: Bibo Mao
---
hw/intc/loongarch_pch_pic.c | 32 +++-
1 file changed, 11 i
在 2025/3/24 下午5:37, Bibo Mao 写道:
Add register read operation emulation in generic read function
loongarch_pch_pic_read(), and use this function for iomem32_high region.
Signed-off-by: Bibo Mao
---
hw/intc/loongarch_pch_pic.c | 27 ---
1 file changed, 8 insertions(+),
在 2025/3/24 下午5:37, Bibo Mao 写道:
With the latest 7A1000 user manual, interrupt status register ISR is
read only. Here discard write operation with ISR register.
Signed-off-by: Bibo Mao
---
hw/intc/loongarch_pch_pic.c | 6 --
1 file changed, 6 deletions(-)
Reviewed-by: Song Gao
thanks.
在 2025/3/24 下午5:37, Bibo Mao 写道:
Parameter address for read and write callback in MemoryRegionOps is
relative offset with base address of this MemoryRegionOps. It can
be directly used as offset and offset calculation can be removed.
Signed-off-by: Bibo Mao
---
hw/intc/loongarch_pch_pic.c | 34
在 2025/3/24 下午5:37, Bibo Mao 写道:
The meaning of macro definition STATUS_LO_START is simliar with
PCH_PIC_INT_STATUS, only that offset is different, the same for
macro POL_LO_START. Now remove these duplicated macro definitions.
Signed-off-by: Bibo Mao
---
hw/intc/loongarch_pch_pic.c
在 2025/3/24 下午5:37, Bibo Mao 写道:
Macro PCH_PIC_HTMSI_VEC_OFFSET and PCH_PIC_ROUTE_ENTRY_OFFSET is renamed
as PCH_PIC_HTMSI_VEC and PCH_PIC_ROUTE_ENTRY separately, it is easier to
understand.
Signed-off-by: Bibo Mao
---
hw/intc/loongarch_pch_pic.c| 20 ++--
hw/loon
在 2025/3/24 下午5:37, Bibo Mao 写道:
For some registers with width 8 bytes, its name is something like
PCH_PIC_INT_ID_LO and PCH_PIC_INT_ID_HI. From hardware manual,
register name is PCH_PIC_INT_ID instead. Here name PCH_PIC_INT_ID
is used, and PCH_PIC_INT_ID + 4 is used for PCH_PIC_INT_ID_HI.
Signe
在 2025/4/18 下午4:45, bibo mao 写道:
On 2025/4/18 下午4:21, WANG Rui wrote:
This patch replaces uses of the generic TRANS macro with TRANS64 for
instructions that are only valid when 64-bit support is available.
This improves correctness and avoids potential assertion failures or
undefined behavior
在 2025/4/10 下午4:50, Bibo Mao 写道:
MSI interrupt is triggered by writing message on specified memory address.
In generic it is used by PCI devices, and no device is connected pch MSI
irqchip with GPIO pin line method, here remove gpio input setting for MSI
controller.
Signed-off-by: Bibo Mao
---
在 2025/4/14 下午3:49, WANG Rui 写道:
Handle specific LoongArch BRK break codes in user-mode emulation
to deliver accurate floating-point exception signals. Specifically,
BRK_OVERFLOW (6) triggers TARGET_FPE_INTOVF, and BRK_DIVZERO (7)
triggers TARGET_FPE_INTDIV. Other BRK codes fall back to a generic
hi, Markus, I had pick up this series for my 'loongarch bug fix for
10.0. 'branch
thanks.
Song Gao
在 2025/3/24 上午11:01, Bibo Mao 写道:
In function virt_cpu_plug() and virt_cpu_unplug(), the error is
impossile. Destination error is not propagated and replaced with
error_abort. With this, the logi
在 2025/3/20 下午4:49, bibo mao 写道:
On 2025/3/19 上午9:41, Song Gao wrote:
In expression 1ULL << tlb_ps, left shifting by more than 63 bits
has undefined behavior.
The shift amount, tlb_ps, is as much as 64. check "tlb_ps >=64" to fix.
Resolves: Coverity CID 1593475
Fixes: d882c284a3 ("target/
在 2025/3/14 上午11:31, Yao Zi 写道:
Clang on LoongArch only accepts fp register names in the dollar-prefixed
form, while GCC allows omitting the dollar. Change registers in ASM
clobbers to the dollar-prefixed form to make user emulators buildable
with Clang on loongarch64. No functional change invovl
在 2025/3/7 下午3:13, Bibo Mao 写道:
Replace legacy reset callback register device_class_set_legacy_reset()
with new function resettable_class_set_parent_phases(). With new API,
it will call reset callback of parent object and then itself.
Signed-off-by: Bibo Mao
---
hw/intc/loongarch_extioi.c
在 2025/3/7 下午3:13, Bibo Mao 写道:
Add reset support with LoongArch pci irqchip, and register reset
callback support with new API resettable_class_set_parent_phases().
Clear internal HW registers and SW state when virt machine resets.
Signed-off-by: Bibo Mao
---
hw/intc/loongarch_pic_common.c
在 2025/3/7 下午3:13, Bibo Mao 写道:
Add reset support with ipi object, register reset callback and clear
internal registers when virt machine resets.
Signed-off-by: Bibo Mao
---
hw/intc/loongarch_ipi.c | 29 +
include/hw/intc/loongarch_ipi.h | 1 +
2 files c
在 2025/3/7 下午3:13, Bibo Mao 写道:
Add reset support with extioi irqchip, and register reset callback
support with new API resettable_class_set_parent_phases(). Clear
internal HW registers and SW state when virt machine resets.
Signed-off-by: Bibo Mao
---
hw/intc/loongarch_extioi_common.c
在 2025/3/7 下午3:13, Bibo Mao 写道:
Replace legacy reset callback register device_class_set_legacy_reset()
with new function resettable_class_set_parent_phases(). With new API,
it will call reset callback of parent object.
The internal state has been cleared in parent object
LOONGARCH_PIC_COMMON, he
在 2025/3/19 上午12:23, Peter Maydell 写道:
On Fri, 7 Mar 2025 at 02:42, Song Gao wrote:
For LoongArch th min tlb_ps is 12(4KB), for TLB code,
the tlb_ps may be 0,this may case UndefinedBehavior
Add a check-tlb_ps fuction to check tlb_ps,
to make sure the tlb_ps is avalablie. we check tlb_ps
when ge
在 2025/3/12 下午2:26, Bibo Mao 写道:
Add index entry for LoongArch system and do some small modification
with LoongArch document with rst syntax.
Signed-off-by: Bibo Mao
---
docs/system/loongarch/virt.rst | 31 ++-
docs/system/target-loongarch.rst | 19
Cc: qemu-sta...@nongnu.org
Fix : https://gitlab.com/qemu-project/qemu/-/issues/2865
在 2024/12/27 下午2:22, Bibo Mao 写道:
From: Guo Hongyu
Refer to the link below for a description of the vldi instructions:
https://jia.je/unofficial-loongarch-intrinsics-guide/lsx/misc/#synopsis_88
Fixed errors in
在 2025/3/12 下午10:35, Markus Armbruster 写道:
Tracked down with scripts/coccinelle/err-bad-newline.cocci.
Signed-off-by: Markus Armbruster
---
net/vmnet-common.m | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Song Gao
Thanks.
Song Gao
diff --git a/net/vmnet-common.m b/ne
在 2025/3/1 下午3:40, bibo mao 写道:
On 2025/2/28 下午5:06, Song Gao wrote:
For LoongArch th min tlb_ps is 12(4KB), for TLB code,
the tlb_ps may be 0,this may case UndefinedBehavior
Add a check-tlb_ps fuction to check tlb_ps,
to make sure the tlb_ps is avalablie. we check tlb_ps
when get the tlb_ps f
Cc: Markus
hi, Markus
What is the difference between CPU_MODEL_EXPANSION_TYPE_STATIC and
CPU_MODEL_EXPANSION_TYPE_FULL?
thanks.
Song Gao.
在 2025/2/13 下午5:16, Bibo Mao 写道:
With full type for query-cpu-model-expansion qmp command, it shows that
it is not supported. For instance,
query-cpu-
在 2024/10/28 下午8:57, Bibo Mao 写道:
If cpu hotplug is enabled, all possible_cpus is initialized with
arch_id set. For ipi interrupt controller, cpu is searched from
possible_cpus with specified arch_id. However it is possible that
cpu object is not created for offlined cpu.
Here safer check is add
在 2024/11/1 上午12:16, Philippe Mathieu-Daudé 写道:
Cc'ing Peter who is working on the Reset API.
On 31/10/24 03:54, Bibo Mao wrote:
With generic cpu reset interface, pc register is entry of FLASH for
UEFI BIOS. However with direct kernel booting requirement, there is
little different, pc register
在 2024/9/20 下午5:04, Bibo Mao 写道:
In order to support irqchip_in_kenrel method, split loongarch extioi
emulation driver into two parts, extioi common and extioi TCG driver.
LoongArch extioi common driver includes vmstate and property interface,
also vmstate load and store interface is defined in e
在 2024/11/5 下午10:27, Richard Henderson 写道:
On 10/10/24 07:35, Song Gao wrote:
+ base = get_pte_base(env, address);
+
+ /* 0:64bit, 1:128bit, 2:192bit, 3:256bit */
+ shift = FIELD_EX64(env->CSR_PWCL, CSR_PWCL, PTEWIDTH);
+ shift = (shift + 1) * 3;
+ ptindex = (a
在 2024/9/18 下午2:54, Bibo Mao 写道:
In order to support irqchip_in_kenrel method, split loongarch pch pic
driver into two parts, pic common and pic TCG driver. LoongArch pic common
driver includes vmstate and property interface, also vmstate load and
store interface is defined in pic common driver.
在 2024/10/28 上午10:38, Bibo Mao 写道:
Add unistd_64.h on arm64,loongarch and riscv platform, and update
linux headers to Linux v6.12-rc5.
Pass to compile on aarch64, arm, loongarch64, x86_64, i386, riscv64,
riscv32 softmmu and linux-user.
---
v2 ... v3:
1. Add unistd_64.h on arm64 and riscv pla
在 2024/10/28 下午5:55, maobibo 写道:
On 2024/10/28 下午3:39, gaosong wrote:
在 2024/10/28 上午10:38, Bibo Mao 写道:
since 6.11, unistd.h includes header file unistd_64.h directly on
some platforms, here add unistd_64.h on these platforms. Affected
platforms are ARM64, LoongArch64 and Riscv. Otherwise
在 2024/10/30 上午3:48, Philippe Mathieu-Daudé 写道:
On 29/10/24 06:35, Song Gao wrote:
When we run “qemu-system-loongarch64 -qmp stdio -vnc none -S”,
we get an error message “Need kernel filename” and then we can't use
qmp cmd to query some information.
So, we just throw a warning and then the cpus
在 2024/10/28 上午10:38, Bibo Mao 写道:
since 6.11, unistd.h includes header file unistd_64.h directly on
some platforms, here add unistd_64.h on these platforms. Affected
platforms are ARM64, LoongArch64 and Riscv. Otherwise there will
be compiling error such as:
linux-headers/asm/unistd.h:3:10: fat
在 2024/10/17 上午10:07, Bibo Mao 写道:
linux-headers/asm/unistd.h:3:10: fatal error: asm/unistd_64.h: No such file or
directory
#include
Also update linux-headers to v6.12-rc3
---
v1 ... v2:
1. update header files in directory linux-headers to v6.12-rc3
---
Bibo Mao (2):
linux-headers: lo
在 2024/9/29 下午3:04, Bibo Mao 写道:
Loongson Binary Translation (LBT) is used to accelerate binary
translation. LBT feature is added in kvm mode, not supported in TCG
mode since it is not emulated.
Here lbt=on/off property is added to parse command line to
enable/disable lbt feature. Also fix regis
在 2024/9/30 下午2:40, Bibo Mao 写道:
With pv steal time supported, VM machine needs get physical address
of each vcpu and notify new host during migration. Here two
functions kvm_get_stealtime/kvm_set_stealtime, and guest steal time
physical address is only updated on KVM_PUT_FULL_STATE stage.
Signe
Ping!
在 2024/10/10 下午2:35, Song Gao 写道:
Loongson-3A6000 and newer processors have hardware page table walker
(PTW) support. PTW can handle all fastpaths of PIL/PIS/PIF/PIE
exceptions by hardware.
V2:
- Remove the '21' magic value, patch1;
- Add a flag is_debug for debug access, patch5;
- Use qa
在 2024/10/16 下午4:13, maobibo 写道:
ping.
@Song
Could you give some comments since it is LoongArch specific?
Regards
Bibo Mao
On 2024/9/29 下午3:22, Bibo Mao wrote:
KVM LBT supports on LoongArch requires the linux-header kvm_para.h,
also unistd_64.h is required by unistd.h on LoongArch since 6.11
available in the Git repository at:
https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20240929
for you to fetch changes up to f7c8ef7bad7495d8c84b262a8b243efe39e56b13:
hw/loongarch/fw_cfg: Build in common_ss[] (2024-09-29 16:2
在 2024/9/28 上午5:32, Philippe Mathieu-Daudé 写道:
LoongArch fw_cfg.c doesn't use target specific declarations,
build it as common object.
Philippe Mathieu-Daudé (2):
hw/loongarch/virt: Remove unnecessary 'cpu.h' inclusion
hw/loongarch/fw_cfg: Build in common_ss[]
include/hw/loongarch/virt.
在 2024/9/14 下午8:10, Jiaxun Yang 写道:
Hi all,
This series refactored booting protocol generation code
to better accommodate different host ABI / Alignment and
endianess.
It also enhanced LoongArch32 support.
Thanks
Signed-off-by: Jiaxun Yang
---
Jiaxun Yang (2):
hw/loongarch/boot: Refac
在 2024/9/18 上午9:42, Bibo Mao 写道:
ACPI ged is used for power management on LoongArch virt platform, in
general it is parsed from acpi table. However if system boot directly from
elf kernel, no UEFI bios is provided and acpi table cannot be used also.
Here acpi ged pm register is exposed with FDT
在 2024/9/18 上午9:42, Bibo Mao 写道:
ACPI ged is used for power management on LoongArch virt platform, in
general it is parsed from acpi table. However if system boot directly from
elf kernel, no UEFI bios is provided and acpi table cannot be used also.
Here acpi ged pm register is exposed with FDT
在 2024/9/14 下午2:46, Bibo Mao 写道:
Variable env->cf[i] is defined as bool type, it is treated as int type
with shift operation. However the max possible width is 56 for the shift
operation, exceeding the width of int type. And there is existing api
read_fcc() which is converted to u64 type with bit
在 2024/9/10 上午10:24, maobibo 写道:
On 2024/9/9 下午9:13, gaosong wrote:
在 2024/9/9 下午7:52, gaosong 写道:
在 2024/9/4 下午2:18, Bibo Mao 写道:
Six registers scr0 - scr3, eflags and ftop are added in percpu
vmstate.
And two functions kvm_loongarch_get_lbt/kvm_loongarch_put_lbt are
added
to save
在 2024/9/18 下午4:23, Bibo Mao 写道:
Implement PMU extension for LoongArch kvm mode. Use OnOffAuto type
variable pmu to check the PMU feature. If the PMU Feature is not supported
with KVM host, it reports error if there is pmu=on command line.
If there is no any command line about pmu parameter, it
在 2024/9/14 下午8:10, Jiaxun Yang 写道:
Hi all,
This series refactored booting protocol generation code
to better accommodate different host ABI / Alignment and
endianess.
It also enhanced LoongArch32 support.
Hi,
I tested LoongArch64 and it works well.
But how to test LoongArch32? Could you pro
在 2024/9/11 上午11:09, Bibo Mao 写道:
ACPI ged is used for power management on LoongArch virt platform, in
general it is parsed from acpi table. However if system boot directly from
elf kernel, no UEFI bios is provided and acpi table cannot be used also.
Here acpi ged pm register is exposed with
在 2024/9/9 下午7:52, gaosong 写道:
在 2024/9/4 下午2:18, Bibo Mao 写道:
Six registers scr0 - scr3, eflags and ftop are added in percpu vmstate.
And two functions kvm_loongarch_get_lbt/kvm_loongarch_put_lbt are added
to save/restore lbt registers.
Signed-off-by: Bibo Mao
---
target/loongarch/cpu.h
在 2024/9/7 下午3:30, Bibo Mao 写道:
Serial port console redirection table can be used for default serial
port selection, like chosen stdout-path selection with FDT method.
With acpi SPCR table added, early debug console can be parsed from
SPCR table with simple kernel parameter earlycon rather than
在 2024/9/4 下午2:18, Bibo Mao 写道:
Six registers scr0 - scr3, eflags and ftop are added in percpu vmstate.
And two functions kvm_loongarch_get_lbt/kvm_loongarch_put_lbt are added
to save/restore lbt registers.
Signed-off-by: Bibo Mao
---
target/loongarch/cpu.h | 12
target/loong
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